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I am currently designing a 6 layer board that has a couple of DC-DC converters on it. The largest one is a buck that transforms 12V to 5V with an ouput current of max 7A.

Layer 2 would be GND, layer 3 power. The others are signal/GND.

Is it good pratice to put the power plane on an inner layer (layer 3)? If so, is it possible to place the input capacitors like this (only top layer shown):

enter image description here


EDIT:

Here is a bigger picture of the Buck. Only a draft, not all components are connected yet, but you get the idea. Also only top layer shown. I place the input capacitors this way to save some space on the PCB. Note, before the buck, there is a battery charger, which also has output capactors. enter image description here

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  • \$\begingroup\$ Also placing those power and GND vias close to each other (i.e. on the sides or under of the capacitors) allows the equal and opposite direction of current flow to help cancel out some of the inductance of the vias. \$\endgroup\$ – DKNguyen Nov 21 '19 at 19:22
  • \$\begingroup\$ Is it possible to position GND and Power vias in the middle of the capacitor, so between VSYS and PGND pad? I will post the bigger picture in an edit of the original post. \$\endgroup\$ – F. Heisenberg Nov 21 '19 at 19:25
  • \$\begingroup\$ Whether or not you can put it under the middle of the cap is dependent on how big the cap is and how big the via is. \$\endgroup\$ – DKNguyen Nov 21 '19 at 19:26
  • \$\begingroup\$ See these two answers: electronics.stackexchange.com/questions/436583/… electronics.stackexchange.com/questions/443323/… \$\endgroup\$ – DKNguyen Nov 21 '19 at 19:29
  • \$\begingroup\$ via is 150um PTH and 450um diameter. As you can see from my picture there would be space under the cap for both, the VSYS and GND vias. \$\endgroup\$ – F. Heisenberg Nov 21 '19 at 19:30
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Power planes on the inner layers is very common. I don't think you would ever place a power plane on an external layer. Some boards place ground planes on both external layers so the PCB shields itself.

It doesn't matter if the caps are along the same track as the current going to the power input pins (think of superposition two separate circuits, AC and DC, not a single circuit that tops off the caps on its way to the IC). As long as it is connected to both power and ground planes as close as possible to the IC, that is more important.

Also placing those power and GND vias close to each other (i.e. on the sides or under of the capacitors) allows the equal and opposite direction of current flow to help cancel out some of the inductance of the vias.

See these two answers for more detail:

Decoupling cap routing on a 4 layer PCB

4 layer board back bypass capacitor power plane connection guideline reason

This is most relevant for high frequency decoupling caps where small amounts of loop inductance are more important (ironically such caps also tend to have the least space underneath them with which to place vias since they are physically smaller).

The larger bulk decoupling caps target lower frequencies so small amounts of inductance don't matter so much. That's why they can be farther from the load being decoupled. They have the most space with which to place vias underneath them though so you can do it if you want, but the caps themselves have so much parasitic inductance (as well as loop inductance due to distance from the load due to their likely placement) that it doesn't really matter.

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  • \$\begingroup\$ but how about the capacitor placement itself. Even if it's unusual, it'll save me some space. I posted a more complete circuit above. Will this placement has some influence on the return path of the loops for the high di/dt currents? \$\endgroup\$ – F. Heisenberg Nov 21 '19 at 19:45
  • \$\begingroup\$ @F.Heisenberg That's fine. Remember that I said the capacitors don't need to be sitting along the trace that goes to the power pin. They could be connected directly to the planes. As long as they are nearby, that's good enough. Loop inductance between cap and load is what matters since it's a separate high frequency AC circuit where the cap is the supply superimposed on the DC supply circuit. You probably don't need that second row of vias in the middle. I would also move at least the GND vias underneath the cap. Saves space and lower inductance. You could do the same with the PWR vias too \$\endgroup\$ – DKNguyen Nov 21 '19 at 19:49
  • \$\begingroup\$ @F.Heisenberg But if it's not hand soldered you might want to leave a small mask so solder doesn't wick into the vias, not to say that your current arrangement doesn't suffer from that issue. \$\endgroup\$ – DKNguyen Nov 21 '19 at 19:54
  • \$\begingroup\$ I understand that capacitors do not need to sit on the same track that they could not be connected via the top layer, or e.g. even be rotated to each by 90° or so as long as they are properly connected to power/gnd plane. But what do you mean with seperated high frequency circuit? Does it mean that switching circuit is decoupled from input/output voltage by the capacitors? \$\endgroup\$ – F. Heisenberg Nov 21 '19 at 20:02
  • \$\begingroup\$ @F.Heisenberg If you get that, don't worry about it. Some people wrongly think that the caps should be sitting along the same trace along which main current going to the power pins flow. Similar to a water pipe that runs by reserve tanks on its way to the destination. \$\endgroup\$ – DKNguyen Nov 21 '19 at 20:05

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