Here is a NOR based SR latch:
And here is a NAND based SR latch:
So, basically first we flipped the orientation of R and S and then declare that in our NAND latch, the output would be flipped i.e. 0 for set and 1 for reset which defies the meaning of set and reset.
Why in the first place did we change the names of the input corresponding to Q only to find out it reverses our output ?
Had we kept the RS naming in both the latches, we would be getting a sensical output that would be 1 for Set regardless of NAND or NOR gates used.
PS: I don't know if this question belongs to this stackexchange as it focuses on why a decision was made. Please move to proper site if required.