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I'm trying to understand nmos mosfets. My textbook has plenty of examples dealing with the nmos with resistors. But I'm currently dealing with a problem with a capacitor on the drain. I just haven't seen this type of problem before and would like some guidance, or better yet, examples.

How do you know when the nmos will be saturated or ohmic?

I want to solve for the voltage across the drain and source.

EDIT: here is my problem: enter image description here

assumptions: before t=0, there is no voltage across the cap and Vg is turned on at t=0

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    \$\begingroup\$ Add a schematic so we can actually help you. \$\endgroup\$
    – Matt Young
    Oct 31, 2012 at 3:42
  • \$\begingroup\$ @MattYoung ok i did \$\endgroup\$
    – mugetsu
    Oct 31, 2012 at 4:19
  • \$\begingroup\$ To solve for the drain voltage, you will need to know the time history of the voltages at V_G and V_S, the values of R and C, and the parameters of the FET. \$\endgroup\$
    – The Photon
    Oct 31, 2012 at 4:35
  • \$\begingroup\$ @ThePhoton i updated basic time assumptions. But I'm looking for an idea of how to do this, the FET parameters and values are not relevant \$\endgroup\$
    – mugetsu
    Oct 31, 2012 at 4:39

1 Answer 1

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This is a somewhat artificial problem, because you've shown no mechanism by which the capacitor is initially discharged so as to have no voltage across it, so it makes it difficult to intuitively understand the problem. But I'll imagine there is also an ideal switch across the capacitor that is closed for t < 0 and opens at t = 0.

After t = 0, the supply VS plays no further role in the behavior of the circuit on the other side of the capacitor, and we can ignore it.

When the FET turns on (I'll assume you mean that VG is high enough to put the MOSFET in saturation), you can treat its channel as a very low value resistor.

That means you will have a very low voltage at the drain, given by the resistor divider equation:

\$ V_D = V_1 \frac{R_{FET}}{R + R_{FET}}\$

Where I've arbitrarily named the node at the FET's drain as "D" and the node between the capacitor and the resitor as "1".

V1 will decay exponentially toward ground as usual for an RC circuit, and VD will decay proportionally.

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  • \$\begingroup\$ what is Rfet? I have Vt and K for the FET \$\endgroup\$
    – mugetsu
    Oct 31, 2012 at 5:04
  • \$\begingroup\$ It's the equivalent resistance of the channel, which I had just mentioned "you can treat ... as a very low value resistor". \$\endgroup\$
    – The Photon
    Oct 31, 2012 at 5:12
  • \$\begingroup\$ Little add to The Photon answer: If I am right VD and V1 will be almost 0V since the capacitor is like an open circuit at t>0. Then I think the answer to your question about voltage on drain and source is 0V (if we ignore the little current going from the gate to the source). \$\endgroup\$
    – damien
    Oct 31, 2012 at 11:10
  • \$\begingroup\$ @damien, you are incorrect. At t=0+ (immediately after t=0) the capacitor behaves like a voltage source (in this case with value 0 V), not like an open circuit. At t=infinity, it behaves like an open circuit. In between, it decays exponentially, depending on the values of C, R (and maybe R_FET), which haven't been stated. \$\endgroup\$
    – The Photon
    Oct 31, 2012 at 15:26
  • \$\begingroup\$ I agree the problem is confusing, because there's no reason for the capacitor to have 0 V across it at t=0, but that is what is stated in the problem, so that is the problem I gave the answer for. \$\endgroup\$
    – The Photon
    Oct 31, 2012 at 15:27

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