I understand that the physical sizes of microchips are generally limited by silicon yields. The larger your chip is, the more waste occurs when you hit a defect in the silicon and have to throw it away, and at some point this becomes unsupportable. I've noticed, however, that modern GPUs always seem to be significantly bigger than CPUs.

High-end consumer GPUs seem to run in the 400-600 mm^2 range, with the RTX 2080 Ti sitting at a whopping 775 mm^2.

It's a bit harder to find die sizes for high-end consumer CPUs, but it looks like the i9-9900K, for example, has a die size of 178 mm^2. The latest Ryzen generation has even smaller sizes, what with their "chiplet" architecture, with the largest single die being the I/O die at around 125 mm^2.

Why are GPUs so much larger than CPUs? Is it something to do with silicon yields and chip architecture, or is there some kind of economic consideration?

  • 5
    \$\begingroup\$ Because parallel processing. \$\endgroup\$
    – DKNguyen
    Nov 25, 2019 at 17:56
  • \$\begingroup\$ @DKNguyen presumably you're referring to the fact that a GPU is a bunch of tiny processors in parallel, so it would be trivial to lose a significant number and route to the others? Are there different grades with 70%, 80% and 90% working? \$\endgroup\$
    – Neil_UK
    Nov 25, 2019 at 17:59
  • \$\begingroup\$ @Neil_UK Well, my comment was not intending to imply anything about binning chips. It was just that if you have a lot of parallel processors and you need a lot of parallel processors then your chip die is going to be really big. In other words, "it's that big because it needs to be". But you bring up an interesting point about binning. I don't know if they do that or not because I don't know how "uniform" a GPU is. It certainly seems like a top candidate for such a practice. \$\endgroup\$
    – DKNguyen
    Nov 25, 2019 at 18:03
  • 2
    \$\begingroup\$ @DKNguyen I know for a fact they do bin gpus intentionally; I know that nvidia's gpus meant for 3-gb and 6-gb GTX 1060 cards were the same, but the 3gb one had some cores disabled. I don't know whether those were disabled because they didn't work, or disabled because their market research suggested they shouldn't make the memory the only difference or something. Probably a combination of both. \$\endgroup\$
    – Hearth
    Nov 25, 2019 at 18:09
  • \$\begingroup\$ Do you have any figures for transistor count and lithography size (nm)? I would suspect Intel is one step ahead of NVidia here, hence slightly smaller chip. \$\endgroup\$
    – winny
    Nov 25, 2019 at 18:18

3 Answers 3


GPUs are parallel processors. Their performance scales linearly with die size, while bigger dies can be run at lower clocks and so be more efficient while still being faster. Therefore, it makes sense to have the die as large as is economically feasible as it will be faster and more efficient.

CPUs have much less parallelism, and so the return from adding more die area is much smaller, or for many applications, non-existent or even negative. Therefore there is a relatively optimal die size for a consumer CPU on each node, and it is generally quite small. The comparison to the comparison to the 175mm^2 9900k is actually slightly misleading, only about 100mm^2 is CPU. The remainder is a relatively large GPU, video decoder, IO, etc. Since there is also a minimum die size needed to fit all the IO pins, low power CPUs dies each generation are often mostly GPU to fill up the unused die space.


Another thing worth mentioning is that a defect on a CPU is hard to mask when you only have a max of 10-20 cores, but much easier to mask (in firmware) on a GPU considering its abundance of similar cores. I.e. you lose a core out of 10, big deal! Lose one out of a thousand, forgivable.

Furthermore, if there were 10 defects uniformly distributed on a CPU chip with 10 cores, it could render it 0% useful, but if you've a 1000 similar cores, it'd still be 99% useful! (assuming no defect on critical sections without fail-safe redundancy)

To keep the core-count consistent, the manufacturer can always throw in a few extra cores that get activated only if necessary or play around with how many available are reported.

Same goes for memory chips and why they're always ahead of CPUs in node shrinkage.


It might have to do with exploitable parallelism and locality on typical use cases; and the fact that power consumption (thus heat) rises roughly with the square of the clock rates.

Typical CPU workloads on consumer PCs usually can not be spread evenly across all cores on a die, so visible (benchmarks, etc.) performance is more limited by peak processor core clock rate. Whereas GPU workloads keep many more of the cores more evenly loaded, and can thus benefit from scaling up the number of cores running at a less scaled down clock rate, reducing die power per area, thus allowing a larger die that will still fit within a PC's thermal envelope. Typical GPU (shader) workloads also have much more geographic locality, so are less limited by time-of-flight across a larger die or larger caches, relative to the clock rates.

  • 1
    \$\begingroup\$ spatial locality? maybe someday we will have GPU world chips where we can use the term geographic locality \$\endgroup\$
    – DKNguyen
    Nov 26, 2019 at 14:28

Your Answer

By clicking “Post Your Answer”, you agree to our terms of service and acknowledge you have read our privacy policy.

Not the answer you're looking for? Browse other questions tagged or ask your own question.