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Schematic

Layout with cut traces shown

I wanted to try to use a buck converter to get 3.3V from a LiPo battery and found the Analog Devices ADP2108. Exact part number: ADP2108AUJZ-3.3-R7. Farnell/Element 14/AVNet link.

I've populated the PCB step by step, first the charger (MAX1555) and checked that it functioned as expected. Then I added the ADP2108 and checked whether the output voltage was 3.3V and clean after the coil. This was all OK after I added the pull up resistor that I forgot on the layout and have since added in the schematic, so the enable pin is pulled high. I did not yet have the PIC delivered, but did have all other components. So I populated all the passives around the pic and the TI TLC59116 LED driver.

After doing so, I checked the Vout of the ADP2108 and found a clean and constant 1.01V instead of the expected 3.3V. I cut the supply traces to the TLC59116 expecting a short there, but that didn't help.

After some searching, I found that I could only get the converter to output 3.3V if I cut all traces (where the red lines are in the layout screenshot). If I connect one of the traces (even the trace with only one of the bypass caps to the non-existent PIC), the output goes back to the same 1.01V.

I've measured and found no short between Vcc and GND. I have also tried to add a load to the output (tried a 470R resistor to ground and a 100mA load on a load bank), to no avail.

I've probed around on the output with a scope and can supply screenshots/descriptions if useful. When the output is 3.3V it runs at 2.7MHz, which is within specifications. If the output is at 1.01V, it also seems to run in PWM mode (with spikes to its input voltage), but the output voltage is too low.

I have no experience with these devices (so far only used LDO's that required no external components apart from caps), but thought it was time to try. Hence, I have no idea where to look next. I tried to measure the total output capacitance between GND and the output, but seem to measure unexpected values (I expect the total capacitance on the output about the sum of all the caps to GND, which is not the case).

I have replaced the coil (I originally used Murata LQM2HPN1R0MG0L as it was described as "high frequency" and had a low ESR) with one of the recommended coils(the Coilcraft LPS3010-102MRB Power Inductor, 1 µH, Shielded, 1.6 A), and did the same with Cin and Cout, to no avail. Also replaced the converter, just in case. All traces are kept as short as I felt possible.

Apart from the issue with the converter, any recommendations on good layout practice is more than welcome.

Requested traces (when unexpected behaviour is shown): CH1 before L1, CH2 after L1. Marker shows PWM pulse length (around 2.9MHz) CH1 before L1, CH2 after L1. Marker shows PWM pulse length (around 2.9MHz)

CH1 before L1, CH2 after L1. Marker shows length in between PWM bursts: CH1 before L1, CH2 after L1. Marker shows length in between PWM bursts


Traces with 10uF added to the output capacitor after cutting the traces to the loads. So about 20uF in total.

CH1 input to switcher, CH2 before L1, CH3 after L1. Max1555 Powered from DC bench supply. CH1 input to switcher, CH2 before L1, CH3 after L1. Max1555 Powered from DC bench supply. CH1 input to switcher, CH2 before L1, CH3 after L1. Max1555 Powered from DC bench supply. CH1 input to switcher, CH2 before L1, CH3 after L1. Max1555 Powered from DC bench supply.

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  • \$\begingroup\$ U2 is the not populated PIC? \$\endgroup\$ – Huisman Nov 26 '19 at 21:56
  • \$\begingroup\$ Yes, the pic is the "large" one below the switcher... \$\endgroup\$ – Dieter Vansteenwegen ON4DD Nov 26 '19 at 21:59
  • \$\begingroup\$ You cut the traces to C3, C2 and C1. What happens if you repair these cuts starting with C3, test, repair trace to C2, test, repair trace to C1? Maybe the cause lies after C1 (e.g. R6 which is connected to C1)? \$\endgroup\$ – Huisman Nov 26 '19 at 21:59
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    \$\begingroup\$ Is it possible for you to give voltage traces between the two terminals of L1 and the output voltage? \$\endgroup\$ – mehmet.ali.anil Nov 26 '19 at 22:12
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    \$\begingroup\$ It looks like the enable pin is open. \$\endgroup\$ – TimWescott Nov 26 '19 at 22:39
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Have you read the guidelines/looked at the recommended layout from Analog? Page 14-15: https://www.analog.com/media/en/technical-documentation/data-sheets/ADP2108.pdf

This is where you start for good layout practice, learn from the chip maker recommendation.

You schematics are very hard to read, take good notes from this post: Rules and guidelines for drawing good schematics Some examples: missing pin numbers on the ADP2108 symbol, incorrect labeling of Enable pin, output capacitor missing reference designator.

However it seems like this circuit should work when connected to your PIC. ADP2108 footprint pinout seems correct.

Do you mind sharing the part number / datasheet you've used? It could be the pinout was not laid properly, just a common mistake for creating footprints from scratch. Maybe not a short to ground but maybe back-driving of some sort.


EDIT - Comments on the posted scope captures

The scope captures you posted look very strange, it looks like the regulator is operating in "burst" mode and the "idle" period is pretty long. Burst mode is for very light-load operation where the load is drawing tiny current, this regulator light-load limit is 80mA (under that limit the regulator switches to a Power Save mode according to Analog's datasheet). It is not so surprising it would operate in this mode with just the PIC connected (unflashed MCU current tend to be very low). What looks strange is the fact that the 1.0V seems to dominate the switching regulator circuit. I think the mystery revolves around solving these 2 problems:

  • Problem 1. When regulator output load is disconnected, output is measured at 3.3V. When adding a tiny resistive load (470R), the output goes to 1.0V.

Could you please post some scope captures of the same 2 nodes when output is disconnected ? Is the PWM in burst mode too? Can you try adding a 10k resistor to the output and get the same scope captures? Is the output at 1.0V already? If not, can you determine what resistive/current load draws it to 1.0V?

  • Problem 2. Why can't the regulator regulate over 1.0V as soon as it is loaded?

If problem 1 did not exists, I would have immediately call the Analog part number, because they do have a 1.0V option (ADP2108AUJZ-1.0-R7). However, seeing 3.3V at no load confirmed the part you ordered is the correct one.

In CH2 trace (blue, output), you can see a tiny voltage bump when the high-side FET is on (eg. L1 is connected to VIN) but the regulator quickly shuts it down and the bump fades back almost immediately, output goes back to a "hard" 1.0V instead (eg. I say "hard" because it looks pretty clean 1.0V step when regulator isn't switching). Is your board exclusively powered by the battery voltage when testing the regulator? If there is another potential power source (even USB) please disconnect.

Does the output stays at 1.0V when you disable the regulator (eg. when Enable pin is low)?

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  • \$\begingroup\$ However it seems like this circuit should work when connected to your PIC. ADP2108 footprint pinout seems correct. Why do you think so? OP writes it doesn't even work without PIC and with load: I have also tried to add a load to the output (tried a 470R resistor to ground and a 100mA load on a load bank), to no avail. \$\endgroup\$ – Huisman Nov 27 '19 at 7:23
  • \$\begingroup\$ I think he meant that he sees no reason why it shouldn't work, instead of "add the PIC and it should work" \$\endgroup\$ – Dieter Vansteenwegen ON4DD Nov 27 '19 at 7:35
  • \$\begingroup\$ François, you are absolutely right about the pin numbers (don't know why they aren't there. Will definitely change), I changed the refdes for the cap for the screenshot on SE because a) it would show exactly which cap I used so you would not have to search for it in the text b) there are only two relevant caps being input and output. I would not leave it like this in my "real" schematic/documentation, but include a BOM. There are some good tips in the page you link though. \$\endgroup\$ – Dieter Vansteenwegen ON4DD Nov 27 '19 at 7:40
  • \$\begingroup\$ I have looked at the recommended layout but found it confusing and rather unclear. I figured that it would not be that critical as long as I kept leads short since the freq is rather low (3MHz max). Maybe that assumption was incorrect to start with. Will link to the requested documents as soon as I have access to my pc (on phone now). I do know I should have started my tree traces that get cut all at the capacitor, instead of the one on the left that goes underneath the IC. \$\endgroup\$ – Dieter Vansteenwegen ON4DD Nov 27 '19 at 7:43
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    \$\begingroup\$ @dim Added in the original post. \$\endgroup\$ – Dieter Vansteenwegen ON4DD Nov 27 '19 at 10:33
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I (probably) finally found what was wrong, and embarrassingly it is a user error. The pic had one 0.1uF cap populated on each of the three traces that started at the coil. I had erroneously mixed up caps and ended up placing 10uF caps. So each time one of the traces was connected that added 10uF to the 10uF that was the recommended output cap on the switcher.

Apparently even just (?) 20uF output capacitance was too much to start up the switcher but had it keep its output at 1.01V. That doesn't seem a lot too me but I don't have enough background to judge properly... I also don't understand why it would then regulate its output to 1.01V instead of keeping it at ground.

Changing the bypass caps to the correct 0.1uF has fixed the issue (up till now).

Sorry for all the time it took to answer, I did learn some thing from the different answers, for which I am really grateful. Thanks!

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  • \$\begingroup\$ I'm sorry to say this does not seem like the root cause of your issue. A good switcher design and implementation can accept hundreds of micro-farad output capacitance. Also remember that the effective capacitance of two 10uF capacitors at 3.3V is closer to half the value for most MLCC accounting for voltage derating. If you have had a Aluminium or Polymer capacitor on the output it could have been a different story. I do recommend looking more into this else you may encounter stability issue with your design. Understanding the 1.0V is probably a piece of the answer. \$\endgroup\$ – eeintech Dec 11 '19 at 13:51
  • \$\begingroup\$ And I just realized this switcher has a soft-start feature so it is not related to output capacitance, your result is just red herring. \$\endgroup\$ – eeintech Dec 11 '19 at 13:54
  • \$\begingroup\$ OK, seems like I need to look further into this. I guess I'll better make the traces you requested. Does the fact that it seems to work with lower output capacitance provide any clues? \$\endgroup\$ – Dieter Vansteenwegen ON4DD Dec 11 '19 at 16:39
  • \$\begingroup\$ Just to be certain, could you cut the traces to C1, C2 and C3 and stack two 10uF capacitors on C5 footprint? If this is indeed killing the regulator, it most likely mean something funky is happening either at the input or the feedback node. It would be nice to have: first confirmation it is isolated to the switcher circuit and second oscilloscope capture of the regulator start-up with the two 10uF caps loaded (switching node, input and feedback) \$\endgroup\$ – eeintech Dec 11 '19 at 19:28
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    \$\begingroup\$ This is a rather mysterious issue... What voltage is the output when you pull EN pin low/to ground? \$\endgroup\$ – eeintech Dec 19 '19 at 15:21

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