I'm designing a switching power supply using a BD9G101G step-down regulator. The datasheet is here: http://rohmfs.rohm.com/en/products/databook/datasheet/ic/power/switching_regulator/bd9g101g-e.pdf.

If you look on page 18 there is a simplified board layout (fig. 47).

There are two areas which need special consideration: SGND and POWERGND. Logical they are all on GND level but need some special routing.

It would be very helpfull if I could somehow name the nets in Kicad schematic/pcbnew accordingly.

I tried designing some kind of net-seperator symbol (which works) but I can't find/make a footprint which I can place on the layout without getting trouble.

So what would be a way to do this?

EDIT: Removed screenshot because it was leading to far away from the actual question.

SOLUTION: Francois was first to mention net-ties (and why not to use them). But special thanks to Dennis :)

  • 2
    \$\begingroup\$ One way I can think of is to simply use a zero ohm resistor to join the nets. I'm sure there are better ways, though, so I'll not make an answer of this suggestion. \$\endgroup\$
    – JRE
    Nov 27, 2019 at 14:57
  • \$\begingroup\$ That's actually what I'm doing currently. But it's pretty ugly. \$\endgroup\$
    – Scheintod
    Nov 27, 2019 at 16:19
  • \$\begingroup\$ Actually I've given this path up now. Doesn't do what I want it to. \$\endgroup\$
    – Scheintod
    Nov 27, 2019 at 17:03

2 Answers 2


Alright so the figure you are referring to is a bit confusing. Rohm isn't actually requiring 2 separate grounds on your board but pointing out which ground shape is used for switching current return path (POWER GND) and which is intended to be "low-noise" ground for feedback node (SGND). In your design, these 2 shapes should refer to one common ground (GND) and be connected using the vias shown in figure and back-plane (not shown). The reason why they have annotated them differently is that the SGND and PGND shape are actually two separate shapes on the layer shown (top) and that PGND currents shouldn't try to return through SGND as there is no path out.

In most application, it is very highly recommended to use one unique return path (= GND) for all currents, else you end-up creating unnecessary ground return loops which could cause a lot of headaches for other circuits (you do not want to go down this path). The only times you may consider splitting the ground return paths could be, for instance, in very specific application where you have a highly sensitive/low-noise circuit (example: analog, audio or RF circuit) and a high-risk of exposure to ground noise/bounce. In this case, you can create a return path for your general and higher-current ground return to avoid the low-noise circuit and tie the 2 grounds closer to the source (eg. power connector in most case) using a net tie or jumper resistor. Doing this, you are basically forcing the return currents to follow a defined path, however it takes much more effort to implement as you have to consider all potential signals shared between the low-noise circuit and the rest of the board and be able to keep references when jumping from one ground to the other (which could potentially void the ground separation if not done with ultra-care), this is even more important for high-speed signals (example: SPI / I2S). It's really a big mess to separate ground return paths, only do it if you really have to and know what you are doing.

To come back to your initial question, I am only aware of 2 options to tie 2 nets together which are jumper resistors and net ties. However, do not use them here :)

  • \$\begingroup\$ Thank you for your effort. Perhaps I wasn't clear enough but what I intend to do is exactly what you are writing in your first paragraph. But it would make routing much more easy in my design if I could name the "grounds" differently until they reach those vias. \$\endgroup\$
    – Scheintod
    Nov 27, 2019 at 16:28
  • \$\begingroup\$ @Scheintod I understand you want to "ease" the layout process, I would definitely not recommend it and rather spend few hours figuring out how to keep a single ground, I've been there and it sucks, but it's the "right" thing to do to avoid yourself headaches when you get the physical board. In switching power supply designs, I never (never) separate my grounds, too much risk to mess-up the switcher circuit and high-risk of creating EMI (which you might not care of). Do it at your own risk and with full consciousness of the ground return paths ;) \$\endgroup\$
    – eeintech
    Nov 27, 2019 at 16:39
  • \$\begingroup\$ Thanks again :) I'm not sure I'm understanding you correctly. But perhaps I'm looking for the right solution for the wrong problem ... What I'm trying to to is put a (very small) ground plane on my general ground plane and connect it with vias to the backside ground. But it's not really working well because on one hand pcbnew insists on connecting it directly and on the other hand even if I use a workaround (keepout area around) I find myself constantly placing the wrong components there (it's a very cramped layout). So my thought was giving it it's own name to avoid both problems. \$\endgroup\$
    – Scheintod
    Nov 27, 2019 at 16:53
  • \$\begingroup\$ I see the problem you are trying to solve however I don't think it is necessary to add the small ground plane. Why not just adding vias to connect top and bottom ground shapes? Would you mind sharing a screenshot of your layout from all layers involved? \$\endgroup\$
    – eeintech
    Nov 27, 2019 at 17:37
  • \$\begingroup\$ It's a pitty there is no chat here. I think the conversation is leaving the topic. But I always like input from people knowing more then I. So here you are :) The tracks are labeled. This is what I would like to have because I find it much more intuitive to work with. \$\endgroup\$
    – Scheintod
    Nov 27, 2019 at 17:57

I guess the thing you're looking for is a net tie. Its availible as component and has some footprints. If you want to do your own version with right size, its just a copper line with 2 "pins".

EDIT: For the case near A7/U2 this could be a solution: Net tie example With the shematic symbol "Net-Tie_2", where Pin 1 goes to GND and pin 2 to SGND. Just set the pad width in the footprint editor to your tracewidth. In this example footprint I used 2 SMD pad and one through hole.

  • \$\begingroup\$ This is what Francois told me in his second to last sentence. Took me some time to figure out what it is :) See the screenshot near the a7 pin. \$\endgroup\$
    – Scheintod
    Nov 27, 2019 at 18:05
  • \$\begingroup\$ I guess your problem lies left to U2? \$\endgroup\$ Nov 27, 2019 at 18:09
  • \$\begingroup\$ not only but mainly \$\endgroup\$
    – Scheintod
    Nov 27, 2019 at 18:11
  • \$\begingroup\$ Just what I'm trying currently. \$\endgroup\$
    – Scheintod
    Nov 27, 2019 at 18:20

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