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schematic

simulate this circuit – Schematic created using CircuitLab

I am using MCP4921's output voltage as a control input to vary the analogue SMPS output voltage. I am able to establish successful SPI communication with the MCP but it doesn't generate expected output voltage as computed using the formulas mentioned in the datasheet. Tried various combinations of DAC configuration bit, most significant change was observed when I set shutdown bit. When set (config used: Gain - 1. Shutdown - 1), DAC output voltage starts at Vref/2 and continues until VDD. but I wish to use the entire range from 0V to VDD. Can you please suggest on how to do the same ?.

Tried the other configuration (Gain - 1, Shutdown - 0), DAC output voltage seems to vary from 0V to VDD but the linearity in the output could not be observed. VDD is generated at 2800 DAC value instead of 4095 DAC value.

Note: To achieve range from 0V to VDD, Vref was set at VDD. LDAC pin is always connected to GND. Tried both buffered/unbuffered input for Vref, didn't observe any significant improvements in the output linearity. Thanks

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  • 2
    \$\begingroup\$ Please share your schematic. \$\endgroup\$
    – The Photon
    Dec 1, 2019 at 4:38
  • \$\begingroup\$ Updated, please check \$\endgroup\$ Dec 1, 2019 at 5:46
  • 1
    \$\begingroup\$ Sounds like you have an off by one error somewhere, and the bit you think is the shutdown bit is being received as D11. \$\endgroup\$
    – The Photon
    Dec 1, 2019 at 5:59
  • 2
    \$\begingroup\$ Can you share timing diagrams of your sent data, clock, and CS? \$\endgroup\$
    – The Photon
    Dec 1, 2019 at 6:00

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