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I want to play with a custom DSO design:

  • sub 1MSPS
  • Mostly measuring 0-6V signals
  • Some audio signals
  • Power line signals

The hardest thing for me is the power line signals. Sometimes I just want to look at the power line itself (full 250V range) and sometimes look at the power line communications signal right after the zero crossing.

I looked at the talk on How does the input circuit on this oscilloscope manage to accept such a large range of voltages? and understand the concept of the voltage divider and using that to start with.

I also get the concept of varying the gain on the opamp stage via software analog multiplexers and resistor networks.

Looking at the design for the Seeedstudio DSO (http://www.seeedstudio.com/wiki/File:DSO_Quad_Schematic.zip) I can see the multirange stage that controls the opamp gain.

What I can't understand is how the input range is 80Vpp (x1 probe). Their design is above my head. I can't see how they are clamping the voltage that goes into the opamp.

If I want the opamp to be protected for up to 250V no matter what range is configured I figured my only option is:

  1. Put the proper voltage divider in front of the opamp
  2. Have a configurable gain
  3. Clamp the output of the opamp to protect the ADC

My concern is that doing it only on the gain may introduce noise or unanticipated signal degradation issues. If possible I would like to also put the input signal through different paths to control its attenuation and filtering, but I need to protect the opamp clamping its input no matter what.

Is there a resource that explains this kind of input stages?

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  • \$\begingroup\$ I doubt someone will download the zip file to look at the schematic, it would be better to link to the schematic directly. If it is not available, but redistributable you can always put it on your own server as Stackexchange will copy the image. \$\endgroup\$ – Trygve Laugstøl Nov 2 '12 at 7:33
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Sorry for the delay, I ended up not being able to log back in and had to register again using a different email address.

diagram quoted above here http://www.cs.stedwards.edu/~alberto/dso/seeed-input-stage.png (can't post images due to reputation)

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