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The classical definitions are that in a Moore machine the outputs depend only on the state, while in a Mealy machine they are also allowed to depend on inputs.

But what if outputs and/or state transitions and/or register transfer opertions depend on a signal, which is generated inside the module/entity itself and controlled by the state machine? What kind of finite state machine is it? Is it still a Moore machine?

This question puzzles me since ever I learned digital design.

Update: here a simple constructed example. let's there is a state that should be executed 5 times, and output a signal on the last.

case STATE is--inside a process
--other states
when COUNT=>

if COUNTER=4 then
STATE_NEXT<=OTHER_STATE;--state transition depends on internal signal
COUNTER_READY<='1';--external signal depends on internal signal
else
COUNTER_READY<='0';--external signal
COUNTER_NEXT<=COUNTER+1;--increment counter. this RT operation depends on internal signal
STATE_NEXT<=COUNT;
end if;
--when OTHER_STATE=>...
end case;

```
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  • 1
    \$\begingroup\$ When it generates the internal signals, what causes them to change? Is it the machine state? Is it an input? Is there a clock oscillator "inside" the machine? \$\endgroup\$ – The Photon Dec 6 '19 at 6:01
  • \$\begingroup\$ @ThePhoton I added an example to the question \$\endgroup\$ – Andrey Pro Dec 6 '19 at 13:24
  • \$\begingroup\$ your internal signal is just another state of the FSM, like a "counter = 1" state \$\endgroup\$ – Wheatley Dec 6 '19 at 13:33
  • \$\begingroup\$ Counter ready depends on both state and input counter .. Hence makes it mealy output. \$\endgroup\$ – Meenie Leis Dec 6 '19 at 13:34
  • \$\begingroup\$ This is really a matter of opinion. Either the counter is something external controlled and monitored by the FSM, or else the counter state is part of the FSM state and you have not really implemented a classic FSM but rather mixed up two different sorts of state tracking. Your mention of "inside" is not really meaningful - the expression might be sitting next to that making up the FSM but it isn't part of it unless you consider the count register to be an extension of the state register. \$\endgroup\$ – Chris Stratton Dec 6 '19 at 13:54
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The counter value is actually part of the state of the machine. Everything that is stored in a flip-flop inside the machine and has the potential to change the behavior of the machine is its state.

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  • \$\begingroup\$ so the counter is regarded as a kind of second state register? And that means that the output depends only on the state that is by extension is a Moore machine? \$\endgroup\$ – Andrey Pro Dec 6 '19 at 15:26
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    \$\begingroup\$ I would say the counter is an extension of the state register rather than a second state register because they are not independent. And yes, that makes this a Moore machine. \$\endgroup\$ – Elliot Alderson Dec 6 '19 at 15:46

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