The classical definitions are that in a Moore machine the outputs depend only on the state, while in a Mealy machine they are also allowed to depend on inputs.
But what if outputs and/or state transitions and/or register transfer opertions depend on a signal, which is generated inside the module/entity itself and controlled by the state machine? What kind of finite state machine is it? Is it still a Moore machine?
This question puzzles me since ever I learned digital design.
Update: here a simple constructed example. let's there is a state that should be executed 5 times, and output a signal on the last.
case STATE is--inside a process --other states when COUNT=> if COUNTER=4 then STATE_NEXT<=OTHER_STATE;--state transition depends on internal signal COUNTER_READY<='1';--external signal depends on internal signal else COUNTER_READY<='0';--external signal COUNTER_NEXT<=COUNTER+1;--increment counter. this RT operation depends on internal signal STATE_NEXT<=COUNT; end if; --when OTHER_STATE=>... end case; ```