# Implementation of Adjustable Current Limiting Circuit

I have a circuit that can deliver 0-10V and 0-100mA to a load, and want to have an adjustable current limit that will limit the current delivered. To do this I have a current shunt that I monitor, and when the shunt voltage exceeds a threshold a error amplifier starts to turn off a NMOS transistor M1, that behaves as an adjustable resistance. The NMOS drops the voltage at the load to the desired value. When the current is underneath the threshold, U1 is saturated on and M1 is completely on.

This circuit works, but has to have compensation that slows down it's response, or else I see oscillations due to the feedback loop. The real problem is that the circuit takes too long to kick in, and lets the current pass through for a time.

The load current is limited properly eventually, but before that it receives all the current the source can provide. The voltage at the gate of the NMOS slowly ramps up until its DS resistance provides the correct voltage drop to pass only 50mA.

Ideally I would like to see a damped response where the current ramps up, and if starts to exceeds the limit it stops. Is there a good way to implement that with this circuit?

I have looked into NTC/PTC, but due to the fact that if the user wishes the current limit can be changed to arbitrary values I don't think they will work as intended. For example, if the current limit is 5mA, receiving 10mA delivered is a failure. But if the current limit is not set, any current from 0-100mA is acceptable. This means that the temperature isn't really a good indicator of if the circuit needs limiting or not.

My current thought is to use a comparator that will control a transistor that will steal all of the current from the load until the value is stabilized. This means that during over current events, the load voltage will temporarily drop to ~0V until the voltage ramps back up to the limit.

Additional notes: I can't change the supply rails of the error amplifier U1. U1 and M1 don't need to be the OP07 or FDR84OP, I just used them for testing.

• The transient where the load receives more than the set current is less than 1ms. Is this really a problem? Dec 7, 2019 at 23:22
• @anrieff I am using a similar scheme for voltage limiting, and the overvoltage transient can last in upwards of 50-80ms when the limit voltage is close to the load voltage (maybe ~10-20ms if load voltage would be 10V and limit voltage ~5V). I'm not totally sure, would this be a problem? I figured that if limits were set that the load current/voltage should not exceed those values. Dec 7, 2019 at 23:50
• This is a form of servo-loop and all loops have a correction time, a reaction delay to changes in load. A fast loop may correct in microseconds, but with isolation IC's their delay time makes such fast response not possible.
– user105652
Dec 8, 2019 at 0:33
• You should shunt C1 with some R value to avoid OP07 saturation that causes slow recovery. All the work is done at 9V or Vpulse + Vgs(th). All the time is spent getting there. What's wrong with this picture? Dec 8, 2019 at 1:33