Intel PCH Datasheet refers to power wells: Core well, Suspend well, Active Sleep well. Is power well same as power rail/power plane?

Does it have any connection with p-well or n-well in IC fabrication process?

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    \$\begingroup\$ It's 815 pages. We can search but you could give a page reference in your question. Page 177? \$\endgroup\$
    – Transistor
    Commented Dec 8, 2019 at 18:14
  • \$\begingroup\$ I have no idea, which page is to be given as a reference. Iam totally new to this term of power well. \$\endgroup\$ Commented Dec 8, 2019 at 18:28
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    \$\begingroup\$ @DivyaK.S What he is saying is do you expect us to go through all 815 pages ourselves and try to guess which part of the datasheet you are asking about? Narrow things down for us. \$\endgroup\$
    – DKNguyen
    Commented Dec 8, 2019 at 18:33
  • \$\begingroup\$ Page 177. Sorry, I assumed power well is a common term among IC manufacturers. \$\endgroup\$ Commented Dec 8, 2019 at 18:51

1 Answer 1


In the Intel terminology a power well refers to portion of the chip that is powered from a particular voltage rail. This voltage rail could be supplied from externally applied voltage levels on particular pins or it could be an internally generated voltage rail that is derived from another power rail.

When multiple voltage rails are used on a particular chip reverse biased semiconductor diffusion junctions are used to isolate sections of the chip from other sections. The term "well" is used to describe the area within the boundaries of these isolation junctions. Safe operation of the chip generally requires that the most positive externally applied voltage rail be applied first followed by the next most positive and on down to the lowest. The reverse order is required for safe power down sequencing. Observing this proper ordering assures that the isolation junctions remain reversed biased at all times any applied voltage is over about 0.5V.


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