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I'm using the sample/hold blok in LTspice. As shown in the attached pictures and LTspice simulation, the output has not the same amplitude of the input.

For example the input amplitude is 60kV while the output is 70V.

enter image description here

Can you help me?

Thank you.

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According to Undocumented LTspice the output voltage saturation levels default to -10V to 10V.

To solve the issue, you should change the output voltage saturation level as follows (by adding SpiceLine as shown):

enter image description here

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