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I stumbled across this clock generator, and it is new to me. I'd like to calculate its frequency (actually min and max, since there is a trimmer), but I don't know how to do, since similar oscillator looks simpler than this.

I tried to simulate this schematic, but it didn't work.

enter image description here

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  • \$\begingroup\$ How did your simulation fail to work? Can you show it to us? \$\endgroup\$ Dec 10, 2019 at 20:45
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    \$\begingroup\$ Simulating an oscillator usually requires setting an initial condition on the caps; like 0.1V or something. And in this oscillator you need to use schmitt trigger inverters. \$\endgroup\$
    – Aaron
    Dec 10, 2019 at 20:48
  • \$\begingroup\$ try setting intitial conditions for the capacitor in your simulator. Most simulators will attempt to find a stable DC operating point before starting, which for an oscillator of course will not occur. Initial conditions forces it to start from the voltage you specify \$\endgroup\$
    – Neil_UK
    Dec 10, 2019 at 20:49
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    \$\begingroup\$ Be aware that this circuit usually requires CMOS logic gate inverters...other logic families (like TTL variants) may not cope well with such high resistance. \$\endgroup\$
    – glen_geek
    Dec 10, 2019 at 21:29
  • \$\begingroup\$ I'm not sure if it'll work with 74HC04 chips -- they special-make 74HCU04 ("U" for "unbuffered") that act more like the analog inverting amplifiers. It is, in general, a pretty cheezy way to make an oscillator. I'd consider it more a party trick than a serious candidate in a product, unless it's a really cheap product. \$\endgroup\$
    – TimWescott
    Dec 10, 2019 at 23:02

2 Answers 2

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This design might fail on some simulators if the internal ESD diodes are not included.

The gain margin frequency have not have enough gain at the limited slew rate where the frequency is unity gain to produce an output. If AC noise at Vdd/2 the 2nd stage is less than the offset voltage from mismatched FETs , it may not oscillate and just stay at 2.5V

I could simulate failure without diodes and success with internal diodes here.

enter image description here

As for frequency, guess what RC=T is when the ramp goes from diode drop outside rail to Vd/2. Hint f=1/2T with some tolerance for thresholds +/-25%

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  • \$\begingroup\$ This one works well at lower frequencies to replace 555 astable square oscillator. In the MHz region, a 3-inverter ring oscillator is likely better. In this one, the 47k resistor seems somewhat large; combined with the gate's input capacitance it influences frequency. \$\endgroup\$
    – glen_geek
    Dec 11, 2019 at 16:24
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    \$\begingroup\$ The best is Schmitt Trigger 1 inverter Astable \$\endgroup\$ Dec 11, 2019 at 17:12
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The frequency of oscillation is determined by the 2.2k resistor, potentiometer, and 47pF capacitor. The \$RC\$ time constant of these elements will be roughly 100ns to 200ns, depending on the setting of the pot. So, depending on what kind of inverters you use, you should expect frequencies in the 5MHz to 10MHz range.

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