To be absolutely sure that the FET is not supposed to conduct, you should've shorted the FET's gate to the "source". If you leave it floating, god knows what can happen - it's a high-impedance input.
If your FET is indeed an SPP20N60, it is supposed to be an N-FET, in which case it should work in your circuit. If you mistakenly inserted a P-FET, you know what would happen.
Is there any chance that your FET's are possibly fake?
Have you checked the function of the FET somehow in "safe conditions"? I.e., small Vds and using a resistor or a lightbulb to limit the current (or a lab PSU with a constant current limit) and apply some voltage to the gate... You could even try a breakdown test, if you short the gate to "source" and use a high-value series resistor in the "drain" against a full rail voltage...
With the PWM controller attached to the gate: is your D3 diode really present in the circuit? (Have you checked for its forward voltage? for cold joints?) Is C3 in the circuit? If you leave the PWM controller's output detached from the gate (and FET gate shorted, or FET removed from the circuit), does the PWM produce output pulses? You don't want the FET to conduct all the time :-)
Is the L1 really the value you think it is?
The SPP20N60 appears to have 600V nominal voltage. What's the rail voltage in your PFC circuit? Around 400V ? As a very general rule of thumb, in power electronics for 230V mains, I'm used to seeing 800V triacs or other silicon switches - and that's where the 400V PFC topology is NOT involved. If you're working with a 400V PFC application, try using an even higher-rated FET, say 1000-1200V, to stay firmly on the safe side - at least as an experiment while you're debugging your issue. Changing the MOSFET model may help you avoid a fake or a bad batch, and the higher-voltage silicon switch models (in a family of similar siblings) tend to have a slightly higher "sustainable thermal energy before destructive melt-down" - which may also be a factor in your prototype, for one reason or another :-)