I am using a 74LS173 D Flip Flop that has some control lines that may be floating at times before they are asserted. To avoid the control line from doing something I don’t want it to do doing this floating state, I am using pull up / down resistors as necessary to not “assert” the line. For example, on the 74LS173 there is an MR signal that will clear the flip flops if it is HIGH, so that line is pulled down with a 10K resistor.

The strange behavior I am seeing is that my breadboarded version of the attached schematic works as I would expect. If I disconnect the MR line, the 10K pull down keeps the line perfectly low. However when using an SOIC version of the same chip on my PCB, the line jumps to 1V when I disconnect the MR line.

Note I have removed the 74LS245 just to isolate to the 74LS173 and the behavior does not change.

I’ve attached my schematic and the analog capture of the MR line using my DLA.

Also, note the external signal driving the MR signal on the 74LS173 is named CLR on the schematic.


DLA Trace

  • \$\begingroup\$ You cannot use 10K pulldown for TTL =74LS due to input bias current (-1.6mA max) . Are you sure its not a CMOS chip? \$\endgroup\$ Commented Dec 12, 2019 at 19:08
  • \$\begingroup\$ I would also check the ground pin for transients. The same TTL part number from different sources can behave differently when there are transients on the ground pin. \$\endgroup\$
    – PDP11
    Commented Dec 12, 2019 at 19:19

1 Answer 1


Inputs of 74LSnnn parts (and other bipolar TTL families) source currents.

You must draw about 0.4 mA from the MR input for it to be seen as a logic Low. A 10K resistor it much too high a value to make an LS input Low.

  • \$\begingroup\$ right 0.4V/-1.6mA = 250 ohms \$\endgroup\$ Commented Dec 12, 2019 at 19:17
  • \$\begingroup\$ Gotcha, it looks like a 1K ohm resistor worked. \$\endgroup\$ Commented Dec 12, 2019 at 20:30

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