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I'm working decoding some house intercom devices to know when someone is calling and also be able to open the door. To do this I buffer the signal (some models has 15v, others 24v...) to a 3v3 level for mcu reading and later counting the pulse length of each transition. After this I got the following for example while I pulse the call button: 13 "messages", and this is one of them: message

And, after pulse length counting: decoded data

Anyone knows what protocol can be? This is not manchester encoding because there is some 3T pulses (manchester has 1T and 2T pulses only).

Greetings

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  • \$\begingroup\$ Why does msg 1~6 look same as 7~12 ? You ruled out 10 bit Async Start/stop+8 ? \$\endgroup\$ Dec 13, 2019 at 2:45
  • \$\begingroup\$ Treat every 10 bits as ASYNC with no parity \$\endgroup\$ Dec 13, 2019 at 3:04
  • \$\begingroup\$ please post the actual text ... a picture of text is not very useful \$\endgroup\$
    – jsotola
    Dec 13, 2019 at 6:40
  • \$\begingroup\$ can you post a high resolution picture of the waveform? \$\endgroup\$
    – jsotola
    Dec 13, 2019 at 6:47

2 Answers 2

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This is what i see.

The data is 8 bits, parity bit, one or more stop bits. (1,2 and 3 stop bits are seen in the text dump)

The high voltage could represent a 0 or 1, so both interpretations are shown.

The bits could be sent in little endian or big endian format, so both hex translations are shown.

The voltage level of the 1 bit and the bit order are not really important unless the data contains text or numbers, or an error checking scheme is used.

enter image description here

edit:

I think that these are the decoded data bits

an assumption is made that the `LOW` between the messages is missing from the messages

4 low bits (stop bits) were appended to each message (represented by 'x')

message 12 has been folded into two lines

the leading 0xff are not included in the decoded bits on right

the lone single digits on right are the parity bits


#        0xff   0xff                                                   x - implied low   S - start     s - stop
          H  s   H  s    H  L  H  L  H  L  H  s    H  L  H  L  H  s
 0      {10, 1, 10, 2,  10,                   3,   1, 1, 3, 2, 2, x   }        //                     S 0111 0011 0 sss
 1      {10, 2, 10, 2,  10,                   2,   1, 1, 3, 2, 2, x   }        //                     S 0111 0011 0 sss
 2      {10, 1, 10, 2,  10,                   2,   1, 1, 3, 2, 2, x   }        //                     S 0111 0011 0 sss
 3      {10, 2, 10, 2,   2, 1, 1, 1, 1, 2, 2, 2,   1, 1, 3, 1, 4, x   }        //   S 1010 1001 1 ss  S 0111 0111 1 ssss
 4      {10, 1, 10, 2,   2, 1, 1, 1, 1, 2, 2, 2,   1, 1, 3, 1, 4, x   }        //   S 1010 1001 1 ss  S 0111 0111 1 ssss
 5      {10, 2, 10, 2,   2, 1, 1, 1, 1, 2, 2, 2,   1, 1, 3, 1, 4, x   }        //   S 1010 1001 1 ss  S 0111 0111 1 ssss
 6      {10, 2, 10, 2,  10,                   2,   1, 1, 2, 3, 3, x   }        //                     S 0110 0011 1 ssss
 7      {10, 2, 10, 2,  10,                   2,   1, 1, 2, 3, 3, x   }        //                     S 0110 0011 1 ssss
 8      {10, 2, 10, 2,  10,                   2,   1, 1, 2, 3, 3, x   }        //                     S 0110 0011 1 ssss
 9      {10, 2, 10, 2,   2, 1, 1, 1, 1, 2, 2, 2,   1, 1, 3, 1, 4, x   }        //   S 1010 1001 1 ss  S 0111 0111 1 ssss
10      {10, 2, 10, 2,   2, 1, 1, 1, 1, 2, 2, 2,   1, 1, 3, 1, 4, x   }        //   S 1010 1001 1 ss  S 0111 0111 1 ssss
11      {10, 2, 10, 2,   2, 1, 1, 1, 1, 2, 2, 2,   1, 1, 3, 1, 4, x   }        //   S 1010 1001 1 ss  S 0111 0111 1 ssss
12      {10, 2, 10, 2,   2, 1, 1, 1, 1, 2, 2, 2,   1, 2, 2, 2, 3, 4   }        //   S 1010 1001 1 ss  S 0011 0011 1 ssss
12+     {10, 3, 10, 3,   2, 1, 1, 1, 1, 2, 2, 3,   1, 1, 7,       x   }        //   S 1010 1001 1 sss S 0111 1111 0 sss
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  • \$\begingroup\$ well done js .... \$\endgroup\$ Dec 16, 2019 at 4:55
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That's a standard UART waveform. NRZ with one start bit, 8 data bits, one parity bit and one stop bit. Little endian - the data lsb is transmitted first. Odd parity: parity is high for odd number of bits high. Note that this is not what is transmitted on an RS232 line, since RS232 receivers and transmitters (as opposed to the UART) are inverting.

In the waveform display, each dot represents the middle of a bit cell for data and parity. Start and stop bits have no dots.

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  • \$\begingroup\$ The image shows the polarity of RS232 with '0' = high voltage and '1' = low voltage. Start bits are '0' and stop bits are '1', as the idle level between transmissions. \$\endgroup\$ Dec 13, 2019 at 8:59

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