I am learning to program programmable devices using a XC9572XL CPLD. I would like to know how much knowledge from programming CPLDs (in Verilog, VHDL) will be transferable to programming FPGAs (not necessarily Xilinx FPGAs).
The main difference is that you program a CPLD once, and it stores its configuration in non-volatile memory, and then if you power cycle it it will return to the previous configuration without needing to be programmed again. With FPGAs (except for a few special devices or families) every time you power up the device you need to re-program it.
Because of that, many FPGAs have hard-coded logic to re-program themselves from an EEPROM or flash chip after power-up.
Another thing to keep in mind is FPGAs are generally more complex than CPLDs so their configuration files are generally larger, sometimes much, much larger.
Also, the XC95 series is quite old at this point, and the configuration options available for FPGAs have evolved since then. So read the datasheet (or configuration users guide) for your FPGA to find out all the configuration options available for it and pick the best one for how you're using the device.
All of it. Think of a CPLD as a subset of what's available on an FPGA. The way you synthesize HDL to a CPLD is the same. The main difference is an FPGA typically contains IP blocks that you can include without having to write the code yourself.
There are certainly differences in the way the devices implement your logic, and the steps needed to download that implementation, but the skills need to write synthesizable RTL are the same.