There are plenty of questions about how to size decoupling capacitors in digital systems, but I have not found the answer to my specific question.

They are some capacitances that are usually put externally in circuits with MCUs or other digital circuits between GND and VDD. Their main role is that of reducing the power supply fluctuations. One of these kind of fluctuations is the so called ground bouncing, which is the drop of the voltage supply on the parasitic resistance of the supply line during the instants in which transistors absorb more current. It may be seen as a drop of VDD, or a rise of VGND, as shown in this graph.

I have seen in some datasheets (and the same has been written in some other questions) that usually they are chosen with 0.1uF capacitance (and surely not more than 1uF). But I do not understand the specific reason of putting this upper bound. I understand that their capacitance must be quite high (high capacitance = high smoothing effect), but why do we stop at 0.1 or 1uF? Why not 10uF, 100uF, ideally infinite F?

For instance, in stabilised DC voltage supply, I have always used (in parallel, after Graetz Bridge and before the voltage regulator) an electrolytic capacitor of 15.000 uF, and its purpose was, at least conceptually, similar to that described before.


Parasitic inductance. Larger caps tend to come in large packages and larger packages have more parasitic inductance and therefore are not effective at high frequencies.

The limiting factor for decoupling low frequencies is capacitance, but the limiting factor for decoupling high frequencies is parasitic inductance. Ideally, you're better off using the tiniest possible package you can get, with the largest amount of capacitance available in that package, and then using a lot of them in parallel until to achieve the total capacitance you need to decouple those lower frequencies. If the parasitic inductance of the smallest package you can get is still too high for the high frequencies you need to decouple, then you need go to PCBs with embedded, distributed capacitance.


Inductors look a bit like big resistors to high frequencies and small resistors to low frequencies. The entire reason we need decoupling capacitors in the first place is because all wires and traces have inductance and sudden changes in current demand by digital circuits switching causes voltage drops or spikes via these inductors if the load current is flowing through them. This appears at the power pins of the digital circuits as voltage spikes or voltage droops which disrupt the circuit's proper function.

Similarly, the parasitic inductance in a capacitor is in series with the ideal capacitance and prevents high frequencies from flowing through them easily, which is required if the capacitor is going to properly decouple.

  • \$\begingroup\$ But how can be that inductance relevant, if the voltage supply is about DC voltage? \$\endgroup\$ – Kinka-Byo Dec 15 '19 at 5:31
  • \$\begingroup\$ @Kinka-Byo DC is an idealization but it is not strictly true in the sense it's a perfectly constant voltage and.or current. It's unipolar, yes, but that doesn't mean it can't change and still be unipolar. Current demands change during the operation of digital circuits. That means there is AC riding on top of the ideal DC. These current demands cause voltage drops across the inductances present, so again, an AC voltage riding on top of the DC. \$\endgroup\$ – DKNguyen Dec 15 '19 at 5:33
  • \$\begingroup\$ Ok, thank you very much. Another question: which would be the negative effect of that parasitic inductance? \$\endgroup\$ – Kinka-Byo Dec 15 '19 at 5:34
  • \$\begingroup\$ @Kinka-Byo Look up how an inductor works and how its impedance changes with frequency. Then think about what this would mean for high frequencies trying to pass through a decoupling capacitor if this parasitic inductor was in series with the decoupling capacitor. Also, think about what would happen if this parasitic inductance was just along a wire between power source and load. The whole reason we need decoupling in the first place is because all wires have inductance. Think about what a sudden increase or decrease in current does to the the voltage across this inductor leading to load \$\endgroup\$ – DKNguyen Dec 15 '19 at 5:40

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