Lets take under consideration a 3 state buffer, such as this one:
Since the datasheet doesnt provide the information about the internal build of the buffer, I was wondering either it is safe to assume that in case the chip is not powered up (0V between VCC and GND), the output is in High Z state? Should one worry about any load at the outputs in unpowered state?
I imagine there is a mosfet P + N half bridge at the output.