I want to use AD623 instrumentation op amp to measure current at high side of the circuit:


simulate this circuit – Schematic created using CircuitLab

I was thinking to use a voltage divider like above diagram to drop the voltage to AD623 input limit range. but then I came across this article which describes how one can measure high voltages with low power op amps:

Won’t 150V input burn up the op amp? Not if the V1 voltage is used to generate the positive powersupply (Vcc_H) for the first op amp, OP_A.

And then talks about return path about bias current, but honestly I don't get it.

  • Why it wont burn the op amp?
  • What if we use a regulator to generate positive supply for the op amp?
  • What about negative supply for the negative rail of the op amp?
  • What specification should the mosfet have? do we need a logic level mosfet?

Appreciate it if someone please expand and explain the whole concept of this method in simple terms.

  • \$\begingroup\$ What's the high voltage rail and what is the current range over which it must perform? I see \$30\:\text{V}\$ and I read a quote with \$150\:\text{V}\$ in it and I still don't have any idea if it is one, the other, or still another that you care about. You just don't say. Is this some general question where you don't actually have a problem but are just curious what is done in a variety of cases? Because you'd need a book to get that answer. There are VERY high voltages and the currents are measured very differently than more modest "high" voltages. What are the goal posts here? \$\endgroup\$
    – jonk
    Dec 20 '19 at 1:38
  • \$\begingroup\$ @jonk I do have a problem and that is I don't know how to measure current in voltages higher than op amp limit. now that I find this solution I need to understand how it works to be able to implant it. \$\endgroup\$ Dec 20 '19 at 7:30
  • \$\begingroup\$ There are different approaches. Not just the one you found. But since you only want to understand that particular one, that helps me. I'll leave it for others to discuss with you. \$\endgroup\$
    – jonk
    Dec 20 '19 at 7:50

The key is the Vcc_H and Vcc_L suppl that the op amp is using. It's referenced to the 150V supply, not ground.

And then this OP_A whose power supply voltages are "hanging under" the 150V rail, gets fed the voltages across the current sense resistor. Since these current sense voltages are tiny, they are also close to 150V so nothing fries.

Then the op-amp drives the MOSFET.

You know how a pull-down transistor with a pull-up resistor can be used to convert a low voltage signal to a high high voltage signal (with an logic inversion)? This is similar to that, but upside down: a pull-up transistor with a pull-down resistor lets a very high voltage output a very low one (that is referenced to ground in this case). And instead of the transistor being fully conducting or blocking for a digital signal, it's partially on for an analog signal.

That dissipates a heat, potentially a lot of heat at high voltage differentials, and its heat that the MOSFET dissipates rather than the transistor (you can think of the MOSFET being driven at partially between full on and off as a variable resistor, though a nonlinear one, but the op-amp feedback compensates for that. That's why R3 and R4 are so large, to minimize the current flowing which minimizes heating.

  • \$\begingroup\$ I'm sorry but I didn't understand that; why/how referenced to 150V a 12V op amp? what do you mean by "hanging under the 150V rail"? "You know how a pull-down transistor with a pull-up resistor..." no I don't. how? also you didn't answer some of my questions. how are we going to feed the op amp negative voltage? it isn't possible in this method? can we use a regulator instead of zener? \$\endgroup\$ Dec 19 '19 at 21:20
  • \$\begingroup\$ @ElectronSurf Think about why you put dividers in your original circuit to stop the opamp from frying. Why does it fry? Because the op-amp's supply is 12V referenced to GND, and the current sense voltages are somewhere near 150V (the voltage across the current sense resistor is small). So what happens if instead of the voltage pins of the op-amp being at GND and 12V, what would happen if it was at 150-12V and 150V? \$\endgroup\$
    – DKNguyen
    Dec 19 '19 at 21:26
  • \$\begingroup\$ If you do not need understand the thing about pull-up and pull-down, you are not prepared to understand this circuit and need to go look that up as well as a host of other, fairly basic things. Another thing to look up is why a zener is used, and not a linear regulator. Most linear regulators have an input power pin and a GND pin that is shared between input and output. That is, they are designed to chop off the top end of the voltage not chop of the bottom end which is what this circuit requires. \$\endgroup\$
    – DKNguyen
    Dec 19 '19 at 21:28
  • \$\begingroup\$ Most op-amps also do not have a +V, GND, and -V power terminal. Most only have two because voltage is relative. You could apply +10V and GND across the two power pins, and as far as the opamp is concerned, this is the same as applying +5V and -5V. It's just how it interacts with the rest of your circuit that might change, but to the opamp it looks the same. This is another basic thing. The fact you ask about a negative supply seems to indicate you don't recognize this. \$\endgroup\$
    – DKNguyen
    Dec 19 '19 at 21:33
  • \$\begingroup\$ The PMOSFET is the high voltage device which separates everything to the left of it (which is running between 145 and 150V) to everything to the right (which is running between 0 and 3.3V). The left hand op amp represents the current by driving the PMOSFET until a smaller but proportionate current is running through R3, satisfying the feedback loop on the left. An identical current flows through R4, which thus mirrors the relatively low voltage across R3, but referenced to ground so that it can be measured on your DAC. The circuitry on the left sees no more than 5V even though it's at 150. \$\endgroup\$ Dec 20 '19 at 13:45

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