# Would this circuit work like an SR latch? Why is it better to use two NOR gates?

I am very new to digital logic, and have just started to learn about feedback in circuits. The basic example of an OR gate with its output connected to one of its inputs creates a circuit that seems to behave like an SR latch without a reset function (i.e. once it receives an input it will output high indefinitely) so I am wondering if the following modification to this circuit would allow it to function as a latch, and why the standard topology using two NOR gates is preferred.

• once it receives an input ... this is unclear because it is receiving an input at all times Commented Dec 23, 2019 at 0:29

Would this circuit work like an SR latch?

yes it works well as Q with positive logic input.

Why is it better to use two NOR gates?

• It is minimal and R is faster AND gives both outputs Q & Q*.
• This uses negative logic on inputs.
• Using 2 NAND gates also gives identical results.

The main advantage of your circuit solution is that it is your small and maybe first "invention"... and you understand very well the basic idea behind the elementary latch...

Really, NOR and NAND implementations are minimalistic and tidy. But there is even simpler implementation of a latch as two cross-coupled inverters (1-input gate)... and this is the most elementary memory cell used in SRAM. It would be interesting and useful for you to figure out how it is driven... what are its inputs and outputs.

• So this "two cross-coupled inverters" design is an even simpler memory cell than an SR-latch? Commented Dec 30, 2022 at 0:54
• @ Melab, In a sense, yes. It uses 1-input gates and the same two terminals act both as inputs and outputs. Commented Dec 30, 2022 at 8:49
• It seems more complex because the flow of the current needs to be reversed to change the value. Commented Dec 31, 2022 at 13:11
• @Melab, The control of the SRAM cell is "violent" as its outputs are "attacked" directly by much more powerful voltage sources. It is good to look at the internal structure of a 6-transistor SRAM cell to see where currents flow. Commented Dec 31, 2022 at 19:28

Nobody ever implements individual SR latches in circuit design except within an integrated circuit.

Within an IC the basic active element is a transistor (bipolar or FET) and all such devices act as inverters with one or more inputs to create a NAND or NOR gate as the minimum element.

Creating a non-inverting gate such as an AND or OR gate requires additional devices to invert the signal at the input or output of an inverting gate.

Your SR latch would function but would require more transistors than one made of basic inverting gates. It would also be slower and use more power.

• It is interesting to figure out why transistors "act as inverters"... Commented Dec 24, 2019 at 15:32
• On both bipolar and FET devices an increase in the voltage on the input causes an increase in the current through the device. This, in turn, causes a drop in the voltage at the output of the device, ie the opposite direction to that of the input. Commented Dec 24, 2019 at 15:44
• Maybe, we have to specify this is valid for "enhancement type transistors". Fortunately, most of them are such. Also, the true output voltage drop is across the collector resistor (that's exactly why we inserted it there)... but it is floating. So, we take the complementary voltage drop across the transistor since it is grounded. Another explanation of the inverting phenomenon: Think of the collector resistor (R1) and the collector-emitter part of the transistor (R2) as a voltage divider with a ratio R2/(R1+R2). The input voltage controls this ratio by changing R2 - Vin increase decreases it. Commented Dec 24, 2019 at 16:43
• @Circuitfantasist - it also applies to depletion transistors. Also, all currently available devices have a common pin with input and output so there is no way to make use of the floating drop across the output resistor. Commented Dec 24, 2019 at 20:33
• Yes, it applies... but for negative input voltages - when the input voltage becomes negative, the transistor decreases its current... We can connect a floating load in the place of Rc or in parallel to it. Then, in contrast to the grounded load, the magnitude of the load voltage will increase when the input voltage increases... Commented Dec 24, 2019 at 21:16