How does a common-emitter rail-to-rail opamp output stage work? Is there a discrete example?

Question

I'm reading an article about how a rail-to-rail opamp works. The materials from Maxim and Analog Device all mentioned that, in a conventional operational amplifier, the output stage, in its essence, is a pair of NPN/PNP forming an emitter follower.

One can instantly recognize that the principle of operation is similar to a push-pull output stage found in discrete Class-AB amplifiers, the output stage is used as a buffer for current gain. The input is at the center of the diodes, and since it's an emitter follower, the output is a replica of the input. This arrangement comes with a Vbe drop, with means the output can never get to the power rails.

The articles continue to explain that in order to overcome this limitation, in a rail-to-rail opamp, the output stage is a pair of PNP/NPN transistors forming an common-emitter amplifier. And in this arrangement, the maximum output swing is only limited by Vce_sat, and is able to get very close to the rail.

But I have never seen this configuration before (The only time I've seen it before, is in The Art of Electronics as a bad example of a miswired Class-B amplifier - once an input is applied to the bases, both transistors are turned on and they blow up...).

How does this output stage supposed to work? How do I apply an input? Are there some practical examples of this circuit with discrete transistors?

Answer 1

The reason one doesn't find "rail-to-rail" complementary collectors drivers is that its hard to balance two current sources without accurate sensing using current mirrors.

Unlike emitter followers that buffer base impedance Zout = Rbe /hFE, they are current sources which by definition are high impedance which is not what you need for a voltage source rail to rail driver. Using negative feedback is less stable and chances for shoot-thru are too difficult to prevent.

Most R2R drivers are CMOS but some are high current with NPN low side In complmentary drivers, it is ok to have one current sink, or source if shunted by a complementary low Rce against a low Pch RdsOn resistance, as per below.

e.g. LMV32x X=1,2,4 2.7~5.5V 160mA

e.g. PA50 100Apk 40A power Amp 400W

Answer 2

The ordinary CMOS stage exploits the same idea where a PMOS and NMOS FETs are connected with their drains as a voltage output. We can see it also in the internal structure of a CFA (current feedback amplifier)... and, of course, in every differential stage with a current-mirror dynamic load.

Although this connection is incorrect ("fighting" current sources), it ensures an extremely high gain. We can think of it as of a "dynamic voltage divider" which two resistances vigorously change in opposite directions (like the partial resistances of a potentiometer when we move the slider). So it needs a negative feedback to keep the output voltage somewhere between the two supply rails. We can see the effect of applying a NFB if simply connect the output of a CMOS stage to its input.

In digital CMOS gates it is not necessary.