I haven't found a single document that talks about "Gain Compression" in a power amplifier referring to the typical Ids vs Vds curve. Books talk about a sinusoid "clipping" when showing these curves but never use the term "compression". "Compression" is only used when showing gain vs input power or output power vs input power but is never mentioned when describing the Ids vs Vds curves. Why is that?

Can someone tell me where does compression start to occur on one of these curves and why would gain start to drop at this location?

Idvs Vd and load line


1 Answer 1


You just have to know what to search for .


The small signal gain changes with bias voltage in FETs and bias current in BJT's. Thus the large signal swing (not obvious on your hand drawn chart) changes more near the threshold of turning off or near clipping. What happens is the signal has more gain on one polarity than the other. This results in THD on the signal as well as in power amps the gain is compressed below projected output.

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