I'm currently trying to understand what the Miller plateau is: what the different parameters that influence the Miller plateau are, when it begins, and when it ends. I'm reading document "Fundamentals of MOSFET and IGBT gate Driver circuit" from Texas Instrument, but it misses some details for my understanding.
Miller plateau seems to begins when the diode (consider a buck converter) stops conducting. Then the drain voltage is now not clamped to Vout by the diode and the source to drain voltage can diminish. The Cgd capacitor previously charged between Vgate and the drain voltage which was equal to Vout must release some charge as the drain voltage diminish! So some current is flowing from the driver to the drain "through" Cgd capacitor. Here is the question: why is the current steady? If the driver output current is able to source more current than the Cgd capacitor is able to discharge itself, the current should not be a plateau and inversely, why this plateau is so long? Did I make a mistake?