Controlling high voltage pulsed load

Question

I have designed a power supply that has two outputs, one at -3kV (200mA) and one at -6kV (10mA). A new design challenge has arisen that includes the need to pulse both of the outputs from nominal load to 0A anywhere from 100Hz-100kHz with varying duty cycle. At the moment, although the primary side switches have a frequency of 300kHz, the response to the output loading is not fast enough.

I have posted in other forums and some have mentioned that high-speed linear regulators are able to negate the effects of the load transient. However no-one has been able to assist with a possible circuit for me to attempt to implement. I will attach a schematic which shows what I have so far, without any secondary side control.

I have spoken to some engineers who say that pulsing the input of a linear regulator causes the pulse to be reproduced on the output, however I haven't got much experience with linear regulators to understand what this means. I attempted to do something like this in LTSpice, which I have also attached, but the voltage stresses on the components are too severe and I don't know if this is at all on the right track. I will attach that schematic and results also.

Has anyone dealt with pulsed loads with linear regulators before? Has anyone got any advice to effectively regulate the voltage across the load when the output is pulsed in such a way?

Answer 1

Source Impedance as a function of frequency can be measured that is inverse to load regulation. The open loop impedance can be defined by RdsOn or Rb/hFE. Closed loop impedance reduces output impedance less with rising frequency due to a fixed GBW. This is reduced further by a shunt array of low ESR capacitors as long as it results in a stable "servo" voltage. Some CMOS LDO's have boundary conditions for stability with ESR.

Load regulation error tends to be nonlinear due to internal effects, and to remain practical often a pre-load helps with overshoot or minimum load is expected. This testing and PS specs is done with useful step loads such as 20~100%, 100~50%.

For pulse loads that exceed static power ratings, bulk storage reactance (caps) are necessary.

Where pulse width and frequency have unstable zones of nonlinear error, one has to examine the power Supply Bode plot for gain phase margin with sinusoidal swept frequency current loads. This is called Spectroscopy. This can be useful to analyze materials or find design faults in the regulator components that affect error and feedback.

Has anyone got any advice to effectively regulate the voltage across the load when the output is pulsed in such a way?

That needs to be defined by empirical specs and test results where it fails.