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I am trying to make a discrete component linear power supply. This schematic seemingly works but it doesn't work when I build it on my breadboard.

I am taking 110 volts through a transformer down to 6 volts AC. I added a full bridge rectifier and then a 4700uF capacitor and I get about 8 volts out.

After wiring up the mosfet, the 2 volt zener clamp with a capacitor to create a reference voltage for the inverting input of the op amp. I add a 250k and 10k pot in series on the source of the mosfet.

The power goes from the capacitor to the drain of the mosfet and the output of the opamp goes to the gate of the mosfet.

The opamp reference voltage is created by the zener clamp described above; the positive rail of the zener comes from +8 volt after the rectifier capacitor and the negative rail goes to ground.

When I turn the poteniometer, I don't see any variation in the output from the opamp.

I also notice some voltage movement when I touch the potentiometers but not from actually turning them.

For a simple linear regulator like this that I want to take from 0-5V, why isn't it working?

The first step was drawing out the schematic:

enter image description here

Then I wired it up enter image description here

Here's a cleaner schematic

schematic

simulate this circuit – Schematic created using CircuitLab

It seems like there are many different ways to design a circuit but so far this circuit comes down to a few basic blocks.

There's the current pass element; This can be almost any transistor. There was a comment about me using the n channel mosfet in the incorrect position. I now realize that this has to do with high side [the positive rail] vs low side [the ground rail] switching. It seems as though low side switching can be easier to wire up but causes issues with ground. High side switching is more stable and safe but more complicated to drive; usually there's a NPN type transistor driving the a PNP high side transistor.

Then there's the reference voltage; there was a answer that says the output voltage cannot be lower than the reference voltage in certain configurations.

With this updated schematic I think I have worked out a lot of the errors in the earlier one, although I am still a bit unsure about driving the mosfet with the smaller transistor.

schematic

simulate this circuit

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  • \$\begingroup\$ I updated the circuit schematic; the zener diode is getting power from the same 8v line after the rectifier cap. I think I totally forgot about adding negative feedback to the opamp! \$\endgroup\$ – wenchemist Jan 3 at 4:09
  • \$\begingroup\$ can you give more details on fixing the issues...? \$\endgroup\$ – wenchemist Jan 3 at 4:16
  • \$\begingroup\$ Think about Vin +/- voltages . The pot has no ground reference and lack of output cap. It will be very noisy as shown. Too much gain with a comparator \$\endgroup\$ – Tony Stewart Sunnyskyguy EE75 Jan 3 at 6:04
  • \$\begingroup\$ You need a resistor between +8 V and the cathode of the Zener diode to control the current through the Zener. \$\endgroup\$ – Peter Bennett Jan 3 at 6:24
  • \$\begingroup\$ Why are you trying to make a discrete linear, variable regulator? Is this an educational exercise where you want to know enough to calculate quantitative values and understand why? Or is this just "getting a job done?" \$\endgroup\$ – jonk Jan 3 at 10:26
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I'm going to steal this schematic from these posts:

Basic Op-AMP as voltage regulator

enter image description here

Does this voltage regulator use "on-off" control, or is it a voltage follower? enter image description here

So you can see that your circuit has numerous issues:

  1. Your zener reference has no power supply.

  2. Your zener would fry even if it was connected to a power supply because there is no current limiting resistor.

  3. Your MOSFET is backwards. You said the smoothing cap is connected to the drain of your MOSFET. This is correct, however, what you have drawn in your schematic is the source terminal connected to the smoothing cap.

  4. You have no negative feedback.

  5. Your zener reference is connected to the wrong input
  6. Your divider is connected to the wrong input (your attempt at a divider anyways...it's missing a connection to ground so its not actually a divider as you have drawn it).

  7. Your zener reference is already larger than your desired output voltage, yet you still step down your actual output voltage before comparing it against the zener reference. You either:

a) have your reference be equal to your desired output and compare your actual output against the zener directly (no divider in the negative feedback loop)

OR

b) have the reference be smaller than your desired output, and step down your actual output with a divider before comparing it against the zener. Then your desired output is equal to the inverse of the divider ratio multiplied by the reference voltage. That is because when your actual output equals your desired output the voltage being compared against the reference (the actual output voltage which is stepped down and then fed to the input of the opamp) actually matches the reference voltage.

I also no decoupling capacitors for the opamp.

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  • \$\begingroup\$ points 3, 5, and 6 -- not necessarily. Note that his FET is configured as a common source amplifier (common in low dropout regulators), while yours is configured as a source follower. His FET configuration effectively swaps the two opamp inputs' polarities. \$\endgroup\$ – AnalogKid Jan 3 at 4:47
  • \$\begingroup\$ The part numbers are accurate; the schematic \$\endgroup\$ – wenchemist Jan 3 at 5:00
  • \$\begingroup\$ @AnalogKid His FET configuration gives the opamp practically no control and is basically acting as a forward biased diode...at least if it is a IRFS730 which is an NMOS, but he's using a PMOS symbol. I'm taking the part number as more accurate than the symbol but OP needs to clarify, because as drawn, it is the source that is connected to the cap terminal regardless of the direction of the arrow indicating whether its a PMOS or NMOS. \$\endgroup\$ – DKNguyen Jan 3 at 5:01
  • \$\begingroup\$ The part number IRF730 is correct but many different simulation software draws N-Type and P-Type mosfets differently. I choose N-Type based on the name in the software. My intentions are to have the positive of the rectifier cap go into the drain of the Mosfet and come out the source \$\endgroup\$ – wenchemist Jan 3 at 5:10
  • \$\begingroup\$ In that case, his comments hold; the schematic has a critical conceptual problem in that the it has positive rather than negative feedback.. \$\endgroup\$ – AnalogKid Jan 3 at 12:37
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There are two ways to make a normal linear regulator. Both have a pass transistor, a reference voltage, and an error amplifier.

One way is to have a fixed error amplifier gain and a variable reference voltage. For example, if the zener voltage is 6.2 V and there is a pot across it, and the error amplifier has a fixed gain of 2, then the output voltage is adjustable from approximately 0 V to 12.4 V.

The other way is to have a fixed reference voltage and a variable gain error amplifier. This is what you have. NOTE: The output voltage cannot be lower than the reference voltage, because the minimum circuit gain is 1 (a voltage follower). As with standard opamp circuits, negative feedback is taken from the center node of a 2-resistor voltage divider between the output and GND.

In your schematic, R1 + R2 form the series feedback resistor. The shunt ("lower") resistor is missing. It should be between the R2 wiper and GND. To find the resistor value, divide the max. desired output voltage by the zener voltage to get the max gain needed (again, this must be 1 or greater), assign the max value of R1 + R2 to the series resistor value, and use the non-inverting opamp gain equation to solve for the shunt resistor value.

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  • \$\begingroup\$ can you give some pros and cons of the fixed error amplifier and variable reference voltage vs the fixed reference voltage and variable error amplifier? \$\endgroup\$ – wenchemist Jan 3 at 5:48
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  • You have drawn the IRFS730 as a P-channel FET, and connected it as such. But it's an N-channel device.
  • It's an old FET, so it probably has a threshold voltage of several volts -- even if it were a P-channel it wouldn't run at full drive
  • Your pots are not set up as voltage dividers, just variable resistances into a high-impedance op-amp input. So the output voltage will never get divided down.
  • You aren't feeding any current to your Zener diode; you need to run 1 to 10mA through it by connecting it to your unregulated 8V
  • If you use a P-channel FET, and connect up the op-amp inputs correctly, you'll have tons of gain from the common-source stage with no compensation. Your circuit will oscillate like a bandit.
  • It is 2020. There is no reason to use discrete components for this -- particularly because you're already cheating and using an op-amp.

I strongly suggest that you find a circuit for something that is known to work and just copy it.

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  • \$\begingroup\$ I think i understand, the pots should be in serial but the voltage divider should be between the wiper of the first pot and the fist lead into the second pot? \$\endgroup\$ – wenchemist Jan 3 at 5:14

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