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I am trying to build a 2Hz oscillator using a CD4060 IC and a 32.768kHz quartz crystal for a digital clock project. The schematic below is from a hackersbench article. I've circled the part i'm interested in. I'm trying to find the optimal value for R1. A common bit of advice given is to consult the datasheet for the quartz crystal when selecting resistor and capacitor values etc etc.. I have not been able to find a data sheet for the crystal I have, nor have I been able to find a similar data sheet for any similar crystal.

schematic

This is the crystal I ordered off amazon

There is some information:

Features: Type1: Frequency: 32.768KHz, 12MHz Body Size: 2 x 6mm / 0.08" x 0.24" (DL) Type2: Frequency: 32.768KHz, 8MHz, 16MHz Body Size: 3 x 8mm / 0.12" x 0.31" (DL) Load Capacitance: 12.5pF

Frequency Tolerance : ±20ppm Mounting Type: DIP Number of Pins: 2 Operating Temperature Range: -20℃~70℃ Material: Quartz; Color: Silver Tone

I could simply go with this schematic and hope for the best but i'd really like to understand what i'm doing before I solder things instead of just going by some internet article like an amatuer. I have no idea how he was able to calculate those resistors.

I was able to find this: http://www.ti.com/lit/an/szza043/szza043.pdf Page 12 explains some of the workings of the oscillator, but doesn't go into much detail on actually calculating anything.

My biggest concern is the crystal breaking after prolonged use. I will be using a trimmer cap to adjust the actual frequency to be close to 2Hz.

This seems to be a pretty popular question on here, and it seems to be a pretty involved subject, probably beyond my junior level knowledge. The author of the article does not mention the specs of the crystal.

EDIT: I figured it out and will post my own answer once i test it. The only thing i still need to calculate is the parallel resistors to the crystal. Most sources say “somewhere between 1M and 15M” but i find that sketchy

Here’s what found in the meantime:

https://www.crystek.com/documents/appnotes/pierce-gateintroduction.pdf

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    \$\begingroup\$ 10M is pretty common and only self biases DC but R1 is usually > 3k to limit current density in motional capacitance of Xtal not 300k. \$\endgroup\$ – Tony Stewart Sunnyskyguy EE75 Jan 4 at 17:49
  • \$\begingroup\$ Isn’t it supposed to be equal to the reactive capacitance of C1? \$\endgroup\$ – StrugglingStudent117 Jan 4 at 21:41
  • \$\begingroup\$ No the phase shifting is all done by the CLC equivalent circuit, this is purely to limit power (eg 10uW) \$\endgroup\$ – Tony Stewart Sunnyskyguy EE75 Jan 4 at 21:48
  • \$\begingroup\$ So if my supply voltage is 5v, how do I calculate the limiting resistor? \$\endgroup\$ – StrugglingStudent117 Jan 4 at 22:48
  • \$\begingroup\$ And the bigger question is why do so many schematics use such large resistors in 100k? \$\endgroup\$ – StrugglingStudent117 Jan 4 at 22:59

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