What circuit will output a short latch pulse when the clock input pauses?

Question

I'm transmitting serial data across a cable to a shift register. I transmit data in discrete packets, where different packets have different bit lengths. The clock frequency is about 20 MHz while transmitting.

When each packet ends, I need to generate a short pulse to latch the shift register. I know a packet has ended when the clock stays low for a few cycles.

What circuit will output this latch signal?

Commenters asked some good questions about timing, so I'll clarify:

• The shortest packet is 800 bits, for a duration of 40 μs minimum.
• Idle time between packets is 10 μs minimum.
• The latch pulse duration must be 10 nanoseconds minimum.

Answer 1

Thanks to the commenters 🥳, I've come up with a solution: invert the intermittent clock signal, pass that to a missing pulse detector, and pass that output to a falling-edge pulse detector.

Here's a simulation. Click L or H to start or end a packet.