For my school side project i'm building a digital clock from 40xx series chips. I'm at 11 IC's now, taking up two regular sized breadboards.
While I could simply solder this all onto solderable breadboad, I do also have some PCB perfboard with pre-tinned thru holes. I can't help but wonder if I could somehow condense the layout to make the board smaller. While the breadboard size would work, it leaves my clock a little larger than desired.
Leaves me wondering... How did people even go about routing boards with multiple, maybe dozens of CMOS chips?
What baffles me the most is those chips stacked vertically above one another. My project uses 6 CD4026 IC's to divide time. All 6 are connected to one another for carry outs. I can't imagine any other way to arrange them other than one after another, like this:
And here are my boards.. Possible layout?