I am trying to understand the need for common-mode feedback. In books such as Design of Analog CMOS Integrated Circuits by Razavi, they seem to explain CMFB with a shorted output-input feedback loop - not sure why they do it like that.

Anyways, this brought circuit in mind to me without that feedback loop. Consider enter image description here

It's a differential amplifier with a PMOS current-source load. M3 and M4 are NMOS devices that are the drive transistors. They have a DC level of Vb2 and a small-signal of Vin+ and Vin-. Since, we are dealing in large signal purpose, I ignore the small-signal pertabations on the gates of M3 and M4.

Let's assume that Vb2 and Vb3 and M1, M2, M3, M4 are designed to handle 80uA. Now, let's say M5 has some error and it wants to pull down 100uA.

The lower 80uA current will win and M5 will be forced into the triode/linear region in order to supply the 80uA . Due to this reduction, the voltage at node A (Vds of M5) must decrease.

The circuit should now be in equilibrium right (ignoring the small-signal voltage). In other words, M1, M2, M3, M4 are all happy that their gate-source voltages are now at the correct level to provide 80uA.

Here come's my question, what happens at the output voltage nodes? Do they go up or down?

  • \$\begingroup\$ Your question is very interesting and needs a special attention. I like your way of thinking and will prepare a detailed answer where to explain the idea behind this circuit solution. BTW M5 cannot "be forced... to supply the 80uA" from the side of the drain. Its current can be changed only from the side of the gate (by changing Vb1). The causality is opposite: first, M3 and M4 adjust their Vgs to pass the same total drain current; then, M1 and M2 adjust their Vgs, i.e. Vb3 (through the CMFB network) to pass the same total drain current... but the voltages VA and Vout stay almost constant. \$\endgroup\$ – Circuit fantasist Jan 12 at 19:26
  • \$\begingroup\$ The purpose of differential amplifiers are to reject common-mode noise. For that configuration unity gain just happens to give the maximum differential rejection ratio where >100 dB CMRR is often desireable. This depends on overall topology. \$\endgroup\$ – Tony Stewart Sunnyskyguy EE75 Jan 12 at 23:33
  • \$\begingroup\$ @Tony Stewart Sunnyskyguy EE75, Another very important purpose is to introduce a non-inverting input which makes it possible to make non-inverting and mixed circuits. The common-mode gain here is zero because of two reasons: the current is constant and the voltage is constant when the common-mode voltage varies (constant current flows through a constant voltage source). Conversely, at differential mode, constant current tries to flow through a constant current source (dynamic load); hence the high gain... \$\endgroup\$ – Circuit fantasist Jan 13 at 7:46

We can figure out the ideas behind this sophisticated circuit solution in an intuitive way by thinking of the electronic transistors as of equivalent electrical elements - current and voltage sources. More precisely speaking, they are not sources but rather current-stabilizing and voltage-stabilizing nonlinear elements. When looking into the drain (with fixed Vgs), the transistor is a current source; when looking into the source (with fixed Vg), it is a voltage source.

Structure. From this viewpoint, in the lower part of the picture, two voltage sources (M3 and M4 sources) and one current sink (M5 drain) are connected in parallel to point A. In each (left and right) upper part, two current sources/sinks (M1 and M3 drains, and M2 and M4 drains) are connected in series. What is the point of all this? Let's consider the three basic operating modes to find the answer...

Biasing. The main idea of the differential (long-tailed) pair is to bias transistors not from the side of gates (the classic single-ended solution) but from the side of sources... thus there is no need for input biasing circuits. So let's set constant common input voltages Vb2 and vary Vb1 to adjust the desired bias current.

In the lower circuit part, M3 and M4 adjust their Vgs to pass (1/2 of) the bias current through their drain-source parts. Looking into their sources, the current sink "sees" two voltage sources "helping" it... as though it is shorted... and this is its favorite load condition.

In the upper circuit part, M3 and M4 sink (1/2 of) the bias current from M1 and M2 drains. As a result, Vout+ and Vout- change. The OP questions were, "What happens at the output voltage nodes? Do they go up or down?"

Without CMFB: To answer these questions, let's first suppose, although practically it is not possible, there is no common-mode feedback (CMFB) - the case shown in the picture. Then M1 and M2 act as dynamic loads, i.e., as current sources, that will try to restore the current. As a result, the output voltage Vout will vigorously change... and if we has increased Vb1, it will go down... and this is the answer of the question.

With CMFB: Now suppose the common-mode feedback is connected (not shown in the picture). Simply speaking, it sums Vout+ and Vout- by an op-amp and adjusts Vb3 with the purpose to keep Vout somewhere between the supply rails. So it is a voltage-type negative feedback that modifies M1 and M2 behavior - seen from the side of drains, now they behave as voltage sources, which voltage is set by the CMFB circuit; they are the so-called "active diodes". As a result, the output voltage Vout will not change when changing Vb1 (M5 bias current)... and this is another answer to the question.

So the sequence is: M5 tries to sink the bias current >>> M3 and M4 adjust their Vgs to pass the same total drain current >>> M1 and M2 adjust their Vgs, i.e. Vb3 (through the CMFB network) to pass the same total drain current. Thus M3 and M4 only deliver the 1/2 bias currents from M5 to the "active diodes" M1 and M2. The voltages VA and Vout stay constant since they are "produced" by "voltage "sources" - VA by source followers, Vout by perfect "active diodes".

The question is answered... but for a real benefit of our reasoning, we should consider the other two modes. Thus we will really "understand the need for common-mode feedback"...

Common mode. In this case, we simultaneously vary both input voltages Vb2- and Vb2+ in the same direction (Vb1 is constant to set the desired bias current). The emitter voltage of the common point A follows the input common voltage. To keep the bias current unchanged, the current "source" adjusts its internal resistance thus “helping” the voltage “sources”. Looking into the current sink, they "see" its extremely high differential resistance... as though it is an open circuit... and this is their favorite load condition.

In the upper circuit part, drain currents stay constant. In addition, the common mode feedback keeps the voltages across “active diodes” M1 and M2 constant. So, the common-mode gain is zero because of two reasons: the currents through the "active diodes" are constant and the voltages across them are constant (constant currents flow through constant voltage sources). M3 and M4 drain voltages are constant as well.

Differential mode. Now, we simultaneously vary the input voltages Vb2- and Vb2+ but in opposite directions. The emitter voltage of the common point A stays constant (like a virtual ground). The emitter current "source" works at its favorite load condition - shorted.

Now the most interesting part of our explanation... In the upper circuit part, the common M5 drain current is steered between the two branches of the differential pair. Note the common mode feedback is not active since the average voltage (Vout+ - Vout-) is zero (another virtual ground). So M1 and M2 act as transistors (current "sources"), not as "diodes" (voltage "sources"). They serve as dynamic loads and the differential gain is maximum.

CMFB role has already been revealed: at common mode, it fixes the output voltages somewhere in the middle between the supply rails; at differential mode, it does not affect them. Figuratively speaking, CMFB makes M1 and M2 act as "diodes" (with constant Vds) at common-mode... and as transistors (with constant Id) at differential mode.

Finally, I want to get back to the beginning of the OP question.

"In books such as Design of Analog CMOS Integrated Circuits by Razavi, they seem to explain CMFB with a shorted output-input feedback loop - not sure why they do it like that."

With this introduction (Chapter 9.6, page 314), the author tries (quite awkwardly) to introduce the reader to the idea of the common-mode feedback. It is hard for me to imagine how many thousands of people (including OP) have tried to understand what lies behind the statement, "In some applications, we short the inputs and outputs for part of the operation..." Now I will add another attempt to explain it in an intuitive way...

Each branch of the differential pair (M1-M3 on the left and M2-M4 on the right in the OP picture) can be thought as of a "voltage divider" consisting of two elements - pull-up M1/M2 and pull-down M3/M4. Pull-up elements can be considered as sources and pull-down elements as sinks.

Both sources and sinks can be current type if their gate voltages are kept constant, and voltage type if their gate voltages follow the drain voltages (active diodes). In the simplest case, it is achieved by connecting the gate to the drain (this is the "shorted output-input feedback loop" that Razavi talks about in his bestseller).

If the pull-up transistor acts as a current source and the pull-down transistor as a current sink, each of them will try to impose its current. If there is even a small current difference, the output voltage will vigorously cnahge and the gain will be maximum. This is the well-known dynamic load technique. This arrangement should be used at differential mode.

If either pull-up or pull-down elements in a branch are voltage type, they will fix the output voltage and the gain will be minimum. This is what the author wants to say in the intro.

First (page 315), he considers the case where, by means of the voltage-type negative feedback, bottom transistors M1 and M2 are made acting as "voltage sinks" (active diodes).

Bottom 'diodes'

Then (page 324), he considers the case where, in the same way, top transistors M3 and M4 are made acting as "voltage sources" (active diodes). The result is the same.

Top 'diodes'

Both versions should be used at common mode while the version with conflicting current sources and sinks should be used at differential mode. In practice, the same circuit acts, depending on the mode, either as one or other version.

To finish completely this story, I will answer the main OP question on the top:

I am trying to understand the need for common-mode feedback...

Due to the huge gain, the outputs of the differential amplifier with dynamic loads look like hypersensitive scales that cannot be easily balanced. So the output voltages Vout- and Vout+ can hardly be held between the supply rails and they easily reach them. This can only be done with the help of the stabilizing negative feedback.

In the differential amplifier with single-ended output, both bias and input voltage affect the same output... and the negative feedback fixes the output voltage to the desired "position" (somewhere between the rails).

In our fully-differential amplifier, these functions are separated - the bias current affects only both single-ended output voltages while the input differential voltage affects only the difference between them. This difference is floating and the bias current should first set it in the middle "position" between the rails... and then keep it there. As it is too hardly because of the dynamic loads, there is a need of another negative feedback to do this work... and this is the common-mode negative feedback. It will keep constant the common output voltage (the averaged of Vout- and Vout+) regardless of any interferences that attempt to change it.

So "common-mode" here implies "common-output voltage" and this has nothing to do with the "common-input voltage". CMFB exactly means "negative feedback that keeps the common (averaged) output voltage at some desired level between the rails".

I have prepared a colorful picture to illustrate the written here. I thought to use it in a new general question about this clever idea... but first I put it here to give you food for thought...

CMFB visualized

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    \$\begingroup\$ What an amazing response! Thank you so much! \$\endgroup\$ – AlfroJang80 Jan 22 at 0:54

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