0
\$\begingroup\$

What is the resulting Voltage Transfer characteristics of the modified CMOS-inverter circuit, if the positions of \$NMOS\$ and \$PMOS\$ are interchanged?enter image description here

\$\endgroup\$
  • \$\begingroup\$ 1/ "the modified CMOS-inverter circuit" Which circuit? 2/ Sounds like homework or ( as the text is so short) a running exam question. \$\endgroup\$ – Oldfart Jan 17 at 10:36
  • \$\begingroup\$ It is not a running exam question, I have come across many solutions online all of them suggest this structure to be a weak buffer, but my analysis says otherwise: imgur.com/MlMyVNU . Can you please verify? \$\endgroup\$ – helloworld1e. Jan 17 at 10:48
0
\$\begingroup\$

Switch them and they're both acting as drain followers (like an emitter follower). The circuit will stop inverting, but the output will not go closer to either rail than Vgs(th) unless pulled externally. If the load has a significant bias current, it will be pulled to one rail by the bias current and driven within Vgs(th) of the other rail by the buffer.

| improve this answer | |
\$\endgroup\$

Your Answer

By clicking “Post Your Answer”, you agree to our terms of service, privacy policy and cookie policy

Not the answer you're looking for? Browse other questions tagged or ask your own question.