Here are the following advices for designing the leading edge blanking of a flyback converter. There is also the schematic: enter image description here enter image description here

It tells us that there is reverse recovery current which occurs from the output rectifier diode, I suppose or from the snubber diode (which is not represented on the schematic). If they are considering the output reverse recovery current of the rectified diode I do no think that It will be high as in general the primary has a higher turn number than the secondary. (There is reverse recovery diode only in CCM mode, no?)

It does not mention about primary leakage inductance too? If the flyback works in CCM mode it should have an influence on the voltage spike, no? By contrast, it mentions about leakage source inductance.

  • 1
    \$\begingroup\$ Is that the right picture? Snubber is there, D5. It will have capacitance, and FET has capacitance. And if D5 was conducting, it will conduct in reverse direction until capacitance is discharged. So when FET turns on, there will be an initial surge of current via it, and so sense resistor measures larger voltage over it. \$\endgroup\$ – Justme Jan 18 at 16:52
  • \$\begingroup\$ I did not notice the snubber ! Do you think that the diode capacitance has a larger impact than the primary leakage inductance on the spike ? \$\endgroup\$ – Jess Jan 18 at 16:57

The leading-edge blanking circuitry or LEB is a common circuit found in modern switching power supplies. It is usually built as shown in the below circuit:

enter image description here

When the drive goes high, a short pulse of \$t_{LEB}\$ duration blinds the IC for a small period of time. We are talking about 250-350 ns for ac-dc controllers operating below 100 kHz and around 100-150 ns for high-frequency controllers. This is to prevent the controller from being reset by a current peak happening at the switch closing time:

enter image description here

This peak is contributed by:

  • the MOSFET gate capacitance current which circulates through the sense resistance when the drive goes high
  • the sudden discharge of the total capacitance lumped at the drain. This capacitance is made by the MOSFET capacitance seen at its drain (\$C_{rss}\$ and \$C_{oss}\$), the transformer capacitance and the output diode capacitance.
  • if the converter operates in heavy CCM, then the reverse recovery current (the diode is a short circuit for a small moment of time, half the \$t_{rr}\$) is seen in the primary side as a peak.

The LEB can sometimes be too short and an extra \$RC\$ network needs to be added. I recommend to always include it in designs, with \$R_2\$ and \$C_1\$ very closely located to the control IC and its ground. It will improve noise immunity and attenuate any unwanted negative ringing which can be highly detrimental to a sound operation.

  • \$\begingroup\$ Thank you for your explanations :D \$\endgroup\$ – Jess Jan 18 at 20:36

Your Answer

By clicking “Post Your Answer”, you agree to our terms of service, privacy policy and cookie policy

Not the answer you're looking for? Browse other questions tagged or ask your own question.