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I am trying to develop a circuit in which an RF sinusoid is put into the input of the ADCMP552 PECL output comparator and then the PECL output (square wave ish) is input to the MC100EP140 phase frequency detector, ideally as LV negative ECL. I have two questions:

  1. In general, can I use the ADCMP552 as negative LVECL (even though it's only specced for positive ECL)?
  2. If I need to go from PECL to NECL or vice versa, I would use a blocking cap and need a 50 ohm termination to Vtt= Vcc-2V. Could I use something like the following circuit as a proper 50 ohm termination? As far as I can tell, the DC level is determined by the resistors and the high frequency impedance is only the 50 ohm resistor.

schematic

simulate this circuit – Schematic created using CircuitLab

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In general, can I use the ADCMP552 as negative LVECL (even though it's only specced for positive ECL)?

Yes. The chip doesn't know which node in your circuit is "ground". So you can connect VCC to the node you call ground, and the chip's AGND pin to what you think of as -3.3 V, and the chip won't know anything but that there's 3.3 V potential difference between them.

But remember the input pins will need to be kept in the correct range relative to your new supply voltages. From that datasheet that means they need to be between AGND - 0.2 and VCC - 2.0 V.

Also the control input levels will be taken relative to the voltage of the AGND pin rather than the ground of your circuit.

Could I use something like the following circuit as a proper 50 ohm termination?

Assuming the output signal is more or less DC balanced (spends about 50% of the time at logic high and 50% of the time at logic low), something like that can work.

But you'll also need to provide a DC bias that allows the ECL output pins to source a few milliamps to keep the ECL output stage biased correctly. If you don't provide 50 ohms to VCC-2, you can typically provide ~130 ohms to VCC-3.3 V instead.

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