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A bit of context: I'm working on a smart tracker watch for an 8 year old. A hobby project, and I'm looking for parts to use.

Anyways, that's not what I'm confused by. This is my first project, so please don't judge me if I've done something wrong. But I can't for the life of me figure out why these parts have more than one GND. One of them actually has upwards of 30. What the heck is going on here?

The part in question is from a WL1835MOD WiLink 8 from DigiKey. I've linked the datasheet here: http://www.ti.com/lit/ds/symlink/wl1835mod.pdf

n

It's a Wifi/Bluetooth combo, and the part shows up as two separate parts on Upverter. That's why sometimes I refer to it as 2 parts and sometimes just 1.

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  • \$\begingroup\$ my first guess: shielding. It's a different game if you have one ground "entry point" and then split it over and pass it everywhere (imagine a lolipop made of metal, pretty good antenna, eh?), compared to when you are surrounded with very grounded ground from all sides. \$\endgroup\$ – quetzalcoatl Jan 26 at 22:11
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Because wires and traces are not perfect. They all contain some inductance which impede high frequency currents trying to flow through them.

Needless to say: Radio frequency = really high frequency.

The bad effects are increased noise, voltage spikes when the chip's current demand decreases and voltage dips when the chip's current demand increases.

So what do you do if are trying to move lots of water and all you have are tiny pipes? You use a bunch of tiny pipes in parallel. Parallel inductances results in an overall lower inductance.

Also, because IC packaging is standardized and if you don't need all those pins, you might as well connect them to ground because it reduces noise due to the aformentioned high frequency currents trying to flow through trace inductance.

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  • \$\begingroup\$ Okay, that kinda makes sense. So do I just connect them all to the same ground then? Or do I need some extra part to manage it? \$\endgroup\$ – Nomkid Jan 25 at 0:04
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    \$\begingroup\$ @Nomkid You just connect them all to a ground plane (not traces) because a ground plane has the lowest inductance you can get. If you do not know what "decoupling capacitors" are, look it up, including "resonant peaking". You are going to need them especially for an RF chip like this. You are going to need a good board layout in general for the antenna and all the radio stuff. \$\endgroup\$ – DKNguyen Jan 25 at 0:05
  • \$\begingroup\$ Thanks for the answer, unfortunately I have to leave right now, so I can't mark the post as the answer. I will come back ASAP though, unless there is a mod who can do it for me or something. \$\endgroup\$ – Nomkid Jan 25 at 0:08
  • \$\begingroup\$ Also, I guess that for an RF chip, it's much better to actually ground all unused pins (even if it somehow were not strictly needed for what DKNguyen said) than to leave them not connected to anything internally. All not-connected pins could actually act as some weak capacitors lying around.. probably.. in the same way as you don't leave any free-floating islands of copper and connect them to ground/power if possible.. just a guess though, I'm not an expert here :) \$\endgroup\$ – quetzalcoatl Jan 26 at 22:17
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    \$\begingroup\$ @DKNguyen well, grounded copper can still reflect sufficiently high frequency RF (with wavelength smaller than the size of the copper part). What grounding does prevent is scattering of longer-wavelength components. \$\endgroup\$ – leftaroundabout Jan 27 at 9:18
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Grounds like you're seeing on that package can serve several functions.

1) Multiple ground pins/pads reduce the inductance of the ground paths, which is important to reduce ground bounce. Ground bounce is a shift in the ground voltage within the packege (on the die) caused by having multiple outputs switch at the same time (from dV=L(di/dt)). This sometimes goes by the term SSO, for Simultaneous Switched Outputs.

2) Multiple ground pins/pads also help to isolate one part of a circuit from another. This is especially important in mixed signal (analog or RF + digital) devices, where you don't want digital noise to corrupt the RF, or you don't want one RF path leaking over into another.

EDIT1: Example of ground use on a new chip

We are currently designing a 400 bump-pads (IO) mixed signal (RF+digital+power) chip. Of those 400 pads, 325 are some form of ground (return). Even though the device's primary function is RF, only 10 of the IO are actually RF.

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  • \$\begingroup\$ Thank you for referring to the term "ground bounce". It's actually missing in the accepted answer, and is a nice short mnemonic for that phenomenon. "ground bounce" may actually happen anywhere in a physical layout if the circuit, not only in the package.. I mean, I suppose this term is not only reserved for in-package effects, and we can use it for other cases like if I screw up an RF board layout? \$\endgroup\$ – quetzalcoatl Jan 26 at 22:23
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    \$\begingroup\$ The term ground bounce usually refers to package, or even on-die phenomenon, at least in my experience. While these kinds of effects can propagate to the board itself, they can also be mitigated by the proper placement of decoupling capacitors (close to package pins) and attention to the Power Distribution Network, or PDN. \$\endgroup\$ – SteveSh Jan 27 at 11:55
  • \$\begingroup\$ The use of multiple grounds to separate different circuits on an IC is widespread, but doesn't seem to be the case right here; when it is, the pins will generally have different names (AGND, DGND, PGND, etc.) while these are all GND. Upvote for bringing it up as an important point in general, though. \$\endgroup\$ – Cristobol Polychronopolis Jan 27 at 15:00
  • \$\begingroup\$ Cristobol - Point taken. But I've noticed a lot of the more informative discussions seem to digress a bit (or a lot, in some cases) from the specific question asked by the OP, which in some cases could have been answered with a simple Yes" or "No". \$\endgroup\$ – SteveSh Jan 27 at 15:05
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The electrical reasons for the numerous GND connections are already well described by others. But they are also used to conduct heat out of the module. Find it from the application notes in the datasheet.

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  • \$\begingroup\$ I was surprised to have gotten this far down the page before I saw mention of the "d" word (datasheet). I'm upvoting because of your practical suggestion to look at application notes, which will help clarify things people are explaining in other answers, too. \$\endgroup\$ – dwizum Jan 27 at 19:21
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I once used 74HC00 logic biased linearly, as a 200MHz fet probe to capture enough signal from an NE602 oscillator/mixer's tank circuit that the production line could monitor a spectrum analyzer and set the 3 LOs to 101/107/113MHz.

When first built (my design) I used 2 Inverters in DIP package....the fet-probe oscillated.

cause --- the two inverters *shared" gnd pins (and vdd pins). And the 2nd inverter had to drive a AC_coupled 50 ohm input on the Spectrum Analyzer (was 50ohm in the gain_chain, plus the 50ohm in SA, so 100 ohms, thus 10 milliAmps per volt of load current)

problem---using Vgnd = Lgnd * dI/dT, at approximately 50 MHz Foscillation, assuming 2 volt output thus 1 volt peak, the dI/dT was 50Mhz * 6.28/100 ohms or 300,000,000/100 = 3,000,000 amps per second. The Lgnd was 10nanoHenries. The The Vgnd was 10nH * 3Million = 30 milliVolts. Assuming a gain on only 10X in each of the 2 NAND_biased_linearly gain stages, thus 10*10 = 100X, our Vground becomes 0..03 * 100 = 3 volts. And we'd assumed 2 volts (peak-peak). Hence the oscillation.

cure ---- use two 74hc00, use only one inverter in each package. An alternate cure would be using 150 or 240 ohm output resistor, for 14dB reduction in the Vground.

what was the problem? not enough gnd pins. ( and vdd pins)

[so the down-voter could not provide an actual EXAMPLE, and cast aspersions instead?]

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    \$\begingroup\$ No up or down vote from me, but I would say the downvotes are because you've provided a personal story, but no explanation of why. For someone new, this isn't very helpful - for e.g., when would sharing pins actually be fine. \$\endgroup\$ – awjlogan Jan 27 at 12:22
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    \$\begingroup\$ The answer you've given ends up with the question itself. So you fixed your problem by adding more ground pins.... so "Why are there so many grounds" in your solution? This answer could be improved by explaining why having a shared ground pin was a problem and therefore why adding more ground pins was a solution. \$\endgroup\$ – awsem_eng Jan 27 at 12:51
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Multiple grounds is common in RF applications explained by others. And it's worth noting that using multiple grounds is also an extremely common practice for power converters and power transistors. Remember, those almost chip-scale packages like QFN are tiny, in a 3 mm x 3 mm package, having a single connection is far from insufficient to handle the large current output, and inadequate to dissipate the heat generated internally in converters.

For SOIC and QFN chips, a common solution is using many pins in parallel, and employing a thermal pad at the center of a chip, usually electrically connected to ground to achieve both high electrical conductance and thermal conductance to ground. Leaving the pad unconnected may cause the chip to malfunction. If you leave the thermal pad on a power converter unconnected, the chip may appear to work under low current, but when you attach a load, it immediately turns off due to thermal protection.

A QFN switched-mode power converter chip

And in BGA chips, there is no thermal pad, the only path for heat dissipation is the solder balls. The number of grounds in such chips is even larger, 20-30 ground connections are typical.

A BGA package

All the gray pads are connections to ground. The power and ground and output pins are distributed alternatively for thermal balancing.

Pin-out for the BGA chip

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