pic18f4550 header file error

Question

I am working on eeprom, i am getting the error as follow In file included from spi.c:65:

C:\Program Files (x86)\Microchip\xc8\v2.10\pic\include\pic18f4550.h:1726:3: error: typedef redefinition with different types ('union UEP8bits_t' vs 'union UEP8bits_t') } UEP8bits_t;

also my code is as follows:

#pragma config PLLDIV = 1       // PLL Prescaler Selection bits (No prescale (4 MHz oscillator input drives PLL directly))
#pragma config CPUDIV = OSC1_PLL2// System Clock Postscaler Selection bits ([Primary Oscillator Src: /1][96 MHz PLL Src: /2])
#pragma config USBDIV = 1       // USB Clock Selection bit (used in Full-Speed USB mode only; UCFG:FSEN = 1) (USB clock source comes directly from the primary oscillator block with no postscale)

// CONFIG1H
#pragma config FOSC = HS        // Oscillator Selection bits (HS oscillator (HS))
#pragma config FCMEN = OFF      // Fail-Safe Clock Monitor Enable bit (Fail-Safe Clock Monitor disabled)
#pragma config IESO = OFF       // Internal/External Oscillator Switchover bit (Oscillator Switchover mode disabled)

// CONFIG2L
#pragma config PWRT = OFF       // Power-up Timer Enable bit (PWRT disabled)
#pragma config BOR = ON         // Brown-out Reset Enable bits (Brown-out Reset enabled in hardware only (SBOREN is disabled))
#pragma config BORV = 21        // Brown-out Reset Voltage bits (2.1V)
#pragma config VREGEN = OFF     // USB Voltage Regulator Enable bit (USB voltage regulator disabled)

// CONFIG2H
#pragma config WDT = OFF        // Watchdog Timer Enable bit (WDT disabled (control is placed on the SWDTEN bit))
#pragma config WDTPS = 32768    // Watchdog Timer Postscale Select bits (1:32768)

// CONFIG3H
#pragma config PBADEN = ON      // PORTB A/D Enable bit (PORTB<4:0> pins are configured as analog input channels on Reset)
#pragma config LPT1OSC = OFF    // Low-Power Timer 1 Oscillator Enable bit (Timer1 configured for higher power operation)
#pragma config MCLRE = ON       // MCLR Pin Enable bit (MCLR pin enabled; RE3 input pin disabled)

// CONFIG4L
#pragma config STVREN = ON      // Stack Full/Underflow Reset Enable bit (Stack full/underflow will cause Reset)
#pragma config LVP = OFF   // Single-Supply ICSP Enable bit (Single-Supply ICSP disabled)
#pragma config BBSIZ = BB1K     // Boot Block Size Select bit (1KW Boot block size)
#pragma config ICPRT = OFF      // Dedicated In-Circuit Debug/Programming Port (ICPORT) Enable bit (ICPORT disabled)
#pragma config XINST = OFF      // Extended Instruction Set Enable bit (Instruction set extension and Indexed Addressing mode disabled (Legacy mode))

// CONFIG5L
#pragma config CP0 = OFF        // Code Protection bit (Block 0 (000800-001FFFh) or (001000-001FFFh) is not code-protected)
#pragma config CP1 = OFF        // Code Protection bit (Block 1 (002000-003FFFh) is not code-protected)

// CONFIG5H
#pragma config CPB = OFF        // Boot Block Code Protection bit (Boot block (000000-0007FFh) or (000000-000FFFh) is not code-protected)

// CONFIG6L
#pragma config WRT0 = OFF       // Write Protection bit (Block 0 (000800-001FFFh) or (001000-001FFFh) is not write-protected)
#pragma config WRT1 = OFF       // Write Protection bit (Block 1 (002000-003FFFh) is not write-protected)

// CONFIG6H
#pragma config WRTC = OFF       // Configuration Register Write Protection bit (Configuration registers (300000-3000FFh) are not write-protected)
#pragma config WRTB = OFF       // Boot Block Write Protection bit (Boot block (000000-0007FFh) or (000000-000FFFh) is not write-protected)

// CONFIG7L
#pragma config EBTR0 = OFF      // Table Read Protection bit (Block 0 (000800-001FFFh) or (001000-001FFFh) is not protected from table reads executed in other blocks)
#pragma config EBTR1 = OFF      // Table Read Protection bit (Block 1 (002000-003FFFh) is not protected from table reads executed in other blocks)

// CONFIG7H
#pragma config EBTRB = OFF      // Boot Block Table Read Protection bit (Boot block (000000-0007FFh) or (000000-000FFFh) is not protected from table reads executed in other blocks)

// #pragma config statements should precede project file includes.
// Use project enums instead of #define for ON and OFF.

#include <xc.h>
#include <stdint.h>
#include<pic18f4550.h>
#define _XTAL_FREQ 20000000
#define _LEGACY_HEADERS

//--[ Pin Definitions ]--
#define Read RB0 // Read EEPROM Memory Blocks
#define W_3 RB1 // Write 0x03
#define W_5 RB2 // Write 0x05
#define W_7 RB3 // Write 0x07
//================================
//--[ Function Declarations ]--
void EEPROM_Write(uint8_t, uint8_t);
uint8_t EEPROM_Read(uint8_t);
//================================
void main(void) 
{
  //--[ IO Pins Configuration ]--
  TRISB = 0x0F; // Push Buttons (Inputs)
  TRISD = 0x00; // Output LEDs
  PORTD = 0x00; // Initially OFF

  uint8_t Address=0;

  while(1)
  {
    if(W_3) // Write 0x03
    {
      EEPROM_Write(Address++, 3); 
      __delay_ms(500);
    }
    if(W_5) // Write 0x05
    {
      EEPROM_Write(Address++, 5); 
      __delay_ms(500);
    }
    if(W_7) // Write 0x07
    {
      EEPROM_Write(Address++, 7); 
      __delay_ms(500);
    }
    if(Address == 3)
      Address = 0;
    if(Read == 1) 
    {
      // Read The EEPROM Data Out To PORTD LEDs
      for (uint8_t i=0; i<3; i++)
      {
        PORTD = EEPROM_Read(i);
        __delay_ms(1000);
      }
    } 
  }
  return;
}
//=======================================================
//--[ Functinos Definitions ]--
void EEPROM_Write(uint8_t Address, uint8_t Data)
{
  while(EECON1bits.WR); // Waits Until Last Attempt To Write Is Finished
  EEADR = Address;      // Writes The Addres To Which We'll Wite Our Data
  EEDATA = Data;        // Write The Data To Be Saved
  EECON1bits.EEPGD = 0; // Cleared To Point To EEPROM Not The Program Memory
  EECON1bits.WREN = 1;  // Enable The Operation !
  INTCONbits.GIE = 0;   // Disable All Interrupts Untill Writting Data Is Done
  EECON2 = 0x55;        // Part Of Writing Mechanism..
  EECON2 = 0xAA;        // Part Of Writing Mechanism..
  EECON1bits.WR = 1;    // Part Of Writing Mechanism..
  INTCONbits.GIE = 1;   // Re-Enable Interrupts
  EECON1bits.WREN = 0;  // Disable The Operation
  EECON1bits.WR = 0;    // Ready For Next Writting Operation
}
uint8_t EEPROM_Read(uint8_t Address)
{
  uint8_t Data;
  EEADR = Address;      // Write The Address From Which We Wonna Get Data
  EECON1bits.EEPGD = 0; // Cleared To Point To EEPROM Not The Program Memory
  EECON1bits.RD = 1;    // Start The Read Operation
  Data = EEDATA;        // Read The Data
  return Data; 
}

Answer 1

You should never include any controller header directly always (and only) use xc.h

to summarize:

• select the correct device under : Project Properties\Conf:[default]
• include xc.h

That's all. Every SFR should be defined now.