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I am trying to learn about UART communication with my MSP430FR6989 microcontroller from TI (link), and that is a link for the User Guide (link)

The idea of my mini project is to connect the MSP430 uart_tx_pin to its uart_rx_pin, and enable the UART Transmit ISR. When a value is written into the Transmit Buffer, a uart_tx_ifg will be set and a UART ISR will be serviced. The Baud rate will be 9600.

  • In order to change the system's clock, we need to write a password (0xA500) at register CSCTL0
    (pg 104/1021 section 3.3.1 of the UG)

  • In order to write into the UART Control Registers, we need to set UCASWRST bit at the UCA0CTLW0control register, and to clear the UCASWRST bit after we finished writing in order to enable the UART.
    (pg 767/1021 section 30.3.1 of the UG)

This is a snippet of my code:

int main (void)
{
    WDTCTL = WDTPW | WDTHOLD;   // stop watchdog timer

    P1DIR |= BIT5;
    P1OUT = 0x00;

    select_clock_signals ();//configures clock
    assign_pins_to_uart ();//assigns GPIO pins to uart tx and rx
    config_9600_uart ();//config uart baud rate for 9600
    init_uart_isr ();//enable UART TX ISR

    _BIS_SR(GIE);//enable Global ISR

    UCA0TXBUF = 0xFA;//when value is written service the ISR

    while(1);

    return 0;
}

EDIT1

Here is the code for select_clock_signals()

void select_clock_signals (void)
{
    //DCO 8Mhz select SMCLK
    CSCTL0 = CSKEY;//0xA500
    CSCTL1 |= (DCORSEL | DCOFSEL_3);//DCO 8Mhz 0x0046
    CSCTL2 |= (SELA__VLOCLK | SELS__DCOCLK | SELM__DCOCLK);//ACLK -> VLO SMCLK,MCLK -> DCO  0x0133
    CSCTL3 = 0x0000;
}

end of EDIT1

I build it and there were no issues and started debugging it with my IDE (CCS v9.2).

Stepping into the instructions inside the main function and enter the select_clock_signals () function was not an issue, when I leave the function I got this error.

,

I tried:

  • Writing a simple light the LED program in a new project, and I didn't get the error
  • rearrange the code so the assign_pins_to_uart() will be called before the select_clock_signals(), and I get the error when the debugger leaves the clock signal function.

EDIT2

I tried debugging my code, and at CSCTL2 = 0x0046; the value of the register automatically changes to CSCTL2 = 0x004E;. so when DCORSEL = 1, FSEL automatically becomes 7.

I don't understand why that happens, as in the UG and the Datasheet they don't mention anything about the value of CSCTL2 being changed by the MSP430.

enter image description here

enter image description here (datasheet pg 44/183)

enter image description here (user guide pg 104/1021)

end of EDIT2

Kindly assist me with this issue, your help would be appreciated.

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  • \$\begingroup\$ Seems the MCU is crashing when you attempt to change the clock, perhaps due to incorrect settings for the selected clock frequency. Can you show us the code for select_clock_signals ()? \$\endgroup\$ Commented Feb 5, 2020 at 7:23
  • \$\begingroup\$ sure I will add it now on EDIT1 \$\endgroup\$ Commented Feb 5, 2020 at 7:29
  • \$\begingroup\$ The CSKEY, and the other macros are defined in the msp460fr6989.h library, I will add them as comments to make it more helpful \$\endgroup\$ Commented Feb 5, 2020 at 7:39

1 Answer 1

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CSCTL1 |= (DCORSEL | DCOFSEL_3);//DCO 8Mhz 0x0046

The comment is wrong. This sets the FSEL field to 7, which is invalid and results in 24 MHz, which does not work without more FRAM wait states.

If you do not want to keep any bits that happen to be set in the register, do not use the | operator.

And you should clear the password after you have initialized the clock registers; here is how TI's msp430fr69xx_cs_01.c example program does it:

  // Clock System Setup
  CSCTL0_H = CSKEY >> 8;                    // Unlock CS registers
  CSCTL1 = DCOFSEL_6;                       // Set DCO to 8MHz
  CSCTL2 = SELA__VLOCLK | SELS__DCOCLK | SELM__DCOCLK;  // Set SMCLK = MCLK = DCO
                                            // ACLK = VLOCLK
  CSCTL3 = DIVA__1 | DIVS__1 | DIVM__1;     // Set all dividers to 1
  CSCTL0_H = 0;                             // Lock CS registers 
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  • \$\begingroup\$ Sorry for the late reply, I don't understand why does setting the DCORSEL bit will cause the FSEL bits to 7, as in the data sheet and the user guide, it specifies that if DCORSEL = 1 and DCOFSEL = 3 then fdco = 8MHz, but when I debug the code I find that DCOFSEL becomes 7 even though I specfiy it as 3. I will put it on edit2 \$\endgroup\$ Commented Feb 6, 2020 at 11:33

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