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I need a circuit to recieve the signal called "50" or "20s" and it trigger a single pulse with five seconds called "TRIP". I set up the circuit below, however, by keeping input J HIGH of the FF7473, the counter repeats the count infinitely. I want to know how to make the counter stops counting when it reaches 5 with J in HIGH.

Circuit that I set up.

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  • \$\begingroup\$ I need that when the input is HIGH, generate a 5 second signal and stop. The generated signal must continue even if the input becomes LOW before 5 seconds. \$\endgroup\$ – Gabriel Maia Feb 5 '20 at 19:45
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    \$\begingroup\$ You could simplify your "stop" logic. If Q0 and Q2 are both high, then stop. It makes no difference what the value of Q1 is at that point. If Q1 is also high, then you have hit 7 and you should have stopped earlier. \$\endgroup\$ – Simon B Feb 5 '20 at 22:07
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    \$\begingroup\$ @GabrielMaia, there is absolutely no reason why you should be putting information into comments .... please edit the post instead, and delete the comment \$\endgroup\$ – jsotola Feb 5 '20 at 22:08
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As you configured the 74LS90, it is always counting, independent of R9(2).

Check the truth table

enter image description here

The first 2 lines are never achieved due to R0(1) and R0(2) being 0.
EDIT The third line is never achieved due to R9(1) being 1.

Let's call the circuit consisting of (NOT+AND+AND+U15) that detects the counter has reached 0101, the 5-detector.
When the counter reaches 5, the 5-detector resets JK FF. But when the counter is reset to ``1001```, the 5-detector no longer holds the JK FF in reset and the next clock pulse, input J being still high is clocked trough and the counters starts counting again.

Suggested solution:
You could use a D flipflop instead. Connect the signals "50" or "20s" to the edge-triggered clock input . This way, the duration of the "50" or "20s" is not relevant anymore.
Connect the 5-detector to the reset pin of the D flipflop and connect the output not-Q to R0(1) and R0(2). The way the 5-detector will also reset the counter.
Connect a '0' to R9(1) to avoid entering the 3rd line in the truth table shown above. The R9(2) becomes don't care (so, tie it to '0' as well).

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  • \$\begingroup\$ The counter is operating in the configuration XXHH and XLXL. When R9 (2) is LOW it counts, when HIGH it stops counting. I need a condition that will stop counting when I reach 5 on the counter. \$\endgroup\$ – Gabriel Maia Feb 5 '20 at 20:19
  • \$\begingroup\$ @GabrielMaia According to the truth table, it is not working in the configuration XXHH (third line) \$\endgroup\$ – Huisman Feb 5 '20 at 20:20
  • \$\begingroup\$ Yes, the configuration XXHH (third line) is to stop the counter. \$\endgroup\$ – Gabriel Maia Feb 5 '20 at 20:51
  • \$\begingroup\$ @GabrielMaia You're right. XXHH will stop the counter. But the corresponding counter code '1001' will disbale the reset signal supplied by U15 and the counter will continue counting again when J is still being high. I hope my suggested solution offers a better approach. \$\endgroup\$ – Huisman Feb 5 '20 at 21:48
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I was able to solve this problem by adding another FF to observe the rising edge of the input signal. Follows image of the solution;

Solution

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