I need a circuit to recieve the signal called "50" or "20s" and it trigger a single pulse with five seconds called "TRIP". I set up the circuit below, however, by keeping input J HIGH of the FF7473, the counter repeats the count infinitely. I want to know how to make the counter stops counting when it reaches 5 with J in HIGH.
As you configured the 74LS90, it is always counting, independent of R9(2).
Check the truth table
The first 2 lines are never achieved due to R0(1) and R0(2) being 0.
The third line is never achieved due to R9(1) being 1.
Let's call the circuit consisting of (NOT+AND+AND+U15) that detects the counter has reached
0101, the 5-detector.
When the counter reaches 5, the 5-detector resets JK FF. But when the counter is reset to ``1001```, the 5-detector no longer holds the JK FF in reset and the next clock pulse, input J being still high is clocked trough and the counters starts counting again.
You could use a D flipflop instead. Connect the signals "50" or "20s" to the edge-triggered clock input . This way, the duration of the "50" or "20s" is not relevant anymore.
Connect the 5-detector to the reset pin of the D flipflop and connect the output not-Q to R0(1) and R0(2). The way the 5-detector will also reset the counter.
Connect a '0' to R9(1) to avoid entering the 3rd line in the truth table shown above. The R9(2) becomes don't care (so, tie it to '0' as well).