Maximum safe gate current for IRFZ44N MOSFET

Question

I'm designing a spot welder using a high-current car starter battery, and a handful of N-channel mosfets of the given type (IRFZ44N, datasheet1, datasheet2). A microcontroller (through some drive logic, probably another mosfets) sends a short pulse to open and close the gates of the power mosfets in parallel (I mean all the gates, sources and drains are connected, making one cheap "supermosfet" from 10 mosfets), sending a high-current pulse to the spot welder's pins.

Since the fets dissipate most of the power in transition (either its resistance or the current is negligible otherwise), I want to open and close them very fast. For that I need to charge and discharge the gates, and for that I need to know what is a reasonable current to do that. Fast transition also helps with balancing out small differences among the mosfets. (10 pcs in parallel, with 160 or 200A pulse current depending on the datasheet per piece, and the battery supposedly can provide around 3-400A)

The datasheets (linked above) didn't help me. Any idea how much current can I use?

Answer 1

You can pretty much use as much gate current as you can pump through the parasitic inductance and gate resistance.

A typical strong FET driver has a peak current capability of a few amps, but layout is critical to getting good gate driver performance.

If you look at the Vgs vs gate charge curve you can see how much charge you have to transfer to the gate to get the Vgs and therefore RDSon you're looking for.

So work back from your desired switching transition time to give you needed charge in needed time which will give you the required current.

For example, as an approximation if you want a Vgs of 12V, (around 45nC on the chart) and you want to switch in 100ns, you need 45nC/100ns which is 450mA.

You can switch faster, but as noted above the parasitics will ultimately limit your switching speed. Another consideration is EMI. The faster the edge the more radiated and conducted EMI you will have due to the harmonics generated.

You may also get voltage overshoot on the drain with extremely fast switching, again due to layout and parasitics. If the overshoot exceeds the VDS rating it can degrade or destroy the device.

Answer 2

Since the fets dissipate most of the power in transition (either its resistance or the current is negligible otherwise), I want to open and close them very fast.

0.35 V * 20 A = 7 W, which is not 'negligible'. However it should be OK for a single pulse of a few seconds.

For safe power dissipation in the transition region you could look at the Maximum Safe Operating Area graph. This says the IRFZ44N can handle 20 A at 12 V for 1 ms. So the 'opening' and 'closing' times don't have to be very fast.

When using several FETs in parallel with common Gate drive you should include an individual resistor in series with each Gate, to prevent ringing between them. These resistors also limit maximum Gate current, making the driver's job easier and evening out the current distribution to each FET.

Answer 3

With FETS rated at 17.5 milliohm max at 25A with a 400 uS pulse width, the assumption that the main losses are during turn-on "seems suspect".

Based on datasheet Figs 1 & 2:

At even 100 A/FET you need under R=V/I = 12/100 = 120 milliohm total circuit resistance to get the 100A. If the battery is good for say 400A then you'd need significant turn on imbalance, no series inductance and very good contacts and low lead loss and ... to achieve the sort of currents that matter.

At 100 A at Tj=25 °C a single FET drops over 1V and at 125C, over 3V. That's far larger than the overall circuit resistance so having one FET hog most of the current is 'very unlikely'.

Even at 400A/10 = 40A/FET you have 0.5V drop (fig1) = 20W (but not for overly long) - so both imbalance and switching losses compared to actual conduction losses seem not too much of an issue.

A date drive rise time of even 10 uS seems liable to be very adequate.
It is usual to add a series gate resistor - typically 1 to 10 ohms, to reduce gate ringing and to LIMIT gate current peaks.

If you have those FETs available they are usable as you propose, but if buying to suit the task, FETs with lower Rdson and higher current ratings may be no dearer and make life easier.

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I'd always add a gate to source zener of somewhat higher than Vgsmax "just because". While a spot welder is unlikely to look too much like an inductive load, Millar coupling from drain spikes can cause gate destruction if they occur - and a gs reverse zener is cheap protection.