When explaining UART communication it is told that the receiver will start sampling the data one start bit after the first falling edge. The falling edge occurs when TX goes from idle state to zero as shown follows:
So normally above the receiver listens the TX line and when it detects idle voltage goes to zero the sampling starts one bit after.
What is not clear to me is that imagine the following scenario where the receiver is turned on and started to listen the TX line at the point I marked in red below(on the leftmost):
In this case will the receiver think(interpret) bit1 and bit2 as idle and the first byte will be received wrong?