Take a look at the example circuit in figure 44 on page 36 of the datasheet:
There's your mysterious capacitor across the differential inputs again.
Now scroll down to page 38 and have a look at section 10.2.2.6 "First-order RC Filter Considerations"
Although the device digital filter attenuates high-frequency noise, use a first order low-pass RC filter at the ADC inputs to further reject out-of-bandwidth noise and avoid aliasing. A differential low-pass RC filter formed by R5, R6, and the differential capacitor CDIFF sets the –3-dB cutoff frequency, fC, given by Equation 16. These filter resistors produce a voltage drop because of the input currents flowing into and out of the ADC. This voltage drop could contribute to an additional gain error. Limit the filter resistor values to below 1 kΩ.
fC = 1 / [2π · (R5 + R6) · CDIFF] (16)
Two common-mode filter capacitors (CCM1 and CCM2) are also added to offer attenuation of high-frequency, common-mode noise components. Select a differential capacitor, CDIFF, that is at least an order of magnitude (10x) larger than these common-mode capacitors because mismatches in these common-mode capacitors can convert common-mode noise into differential noise.
The two resistors R5 and R6 together with your capacitor form a low pass filter to remove high frequency noise from your signal. You need that to help the built in antialiasing filter do its job.