I would like a technical ("engineering") explanation of why a MCU input floating pin can easily change its state depending on the outside electromagnetic interference. Is it related to the fact that the pin is in a high impedance state? If so, how exactly?
1\$\begingroup\$ Basically because it has a very high impedance so you need very little energy to change it's state. (Comes back to Ohms law) \$\endgroup\$– OldfartFeb 15, 2020 at 15:51
As an ultra simplified, 1st year EE model, you can consider a disconnected input to a CMOS chip to be an RC circuit.
The tiny gate leakage currents represent the R, and the tiny gate capacitances plus the stray capacitance from the pad or pin to the outside world being the C's. Change the external EM field to the outer plate of the capacitor enough (ground noise, other nearby PCB traces switching, bonding pad cross-talk, cosmic rays, etc.) and you can change the voltage on the transistor gate.
It is not limited to MCU input pins. Also other CMOS chip inputs work like this. Basically the CMOS input stage is just gate terminals of two MOSFETs. FET gate is basically insulated, but gate needs to have voltage in respect to FET source for the FET to turn on. The FET gate is mainly few picofarads of capacitance load, and draws only very little leakage current, so even a high impedance source will quickly charge few picofarads with small current to have enough voltage to turn on.
Shortly: Noise (outer electromagnetic signals) can create current over conductors. This current induces voltage across a resistor according to Ohm's Law. If the induced voltage is high enough then the input buffer will see this is logic-high. Likewise, if the induced voltage is negative enough then the input buffer will see it as logic-low.
The input impedance may be easily biased by leakage to some DC voltage or by trace capacitance to a mutual trace with a pulsed voltage. CMOS gates have very low input capacitance (x pF) which may be dominated by parallel traces with 10 mil track and gaps, but even far less if the input is floating near Vdd/2 unless there is a resistor driver.
Thus it depends on the crosstalk capacitance and self-bias leakage voltage. Generally, 1M pullup is adequate in less noisy ground plane environments and 10k is used in noisier logic layouts to avoid ripple effects during transition or avoid false inputs from crosstalk. While CMOS outputs range from 20 to 75 Ohms for 74ALV to 74HC logic.
High impedance means in fact, very high resistance.
And EMI can cause dislocation of little charges. Think of a clogged valve at a bike tyre. If you put your pump with an manometer on and give pressure, the pressure easily rises to very high values without performing a lot of work. When you release the piston of the pump the pressure will drop as fast as it has risen before. There was only a little amount of air able to move and had nowhere to go. If the pressure is what you are watching for, (which is somehow similar to voltage) you will detect sharp changes while little has been done.
If the valve isn't clogged (i.e. not floating) you have to move significant more charge into the input to change the pressure. To keep up this analogy: A non floating input (i.e. with pull-up or pull-down resistors) is a bicycle tube with well defined holes. After having moved some charges in it, a certain pressure builds up but will only prevail, as long as you keep charges flowing by constant pumping.
An EMI is e.g. a crow landing on the piston of your pump. If your valve is clogged, pressure will rise and stay elevated until the crow sees a mouse or a cat and decides to move away.
\$\begingroup\$ This didn't help. Analogies fly over my head. I want to know the maths of why a floating pin is susceptible to EMI and why non floating isn't \$\endgroup\$ Apr 28, 2021 at 15:04
If the input pin is floating and “short”, it is electric field interference that causes a voltage fluctuation on the pin. This may arise from electro magnetic fields but the problem is dominated by the electric field perturbations of that EM field and capacitive coupling to the floating MCU pin.
When the pin is in high impedance, it presents as a very small capacitance (a few pF) and practically infinite DC resistance. The pin is vulnerable to noise coupling from outside sources because it takes so little charge to change its state.
Noise coupling can be magnetic (inductive) or capacitive.
The case of bringing one's hand near the floating pin is an example of capacitive coupling: the air gap between the pin and the hand forms a capacitor, in series with the pin's capacitance. The closer the hand, the smaller the dielectric, the larger the coupling capacitor, and the more coupling occurs.
Inductive coupling occurs when a current flows in a nearby circuit, creating a magnetic field. If this is close enough to the floating pin, it too can couple onto it and cause problems.