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I studying for my Power Electronics course and have come across something which I can't seem to wrap my head around.

In a lab, we built a buck converter with an inductive load and measured various transients during its operation, specifically focusing on the transient currents and voltages that occur during switching of the MOSFET. At the end of the lab, the following question was asked:

Describe why a current spike is produced when the MOSFET is switched on, and a voltage spike is produced when the MOSFET is switched off

I am familiar with the fundamental formulas for inductors and capacitors, and from those I would expect that a voltage spike could occur when switching an inductive load, because of a near instantaneous change in voltage across the inductor.
However, this doesn't seem to fit with the question that is being asked, which implies a current spike when switching on and a voltage spike only when switching off.

These are the only two slides I could find from the lectures that show this kind of behavior, but I can not understand how the shown circuits would produce that behavior:

Switching on: MOSFET Switching On

(note: U_CE is the voltage across the MOSFET and Ic is the current through it)

What is the source of this current spike when the MOSFET turns on?

Switching off: MOSFET Switching Off

(note: U_CE is the voltage across the MOSFET and Ic is the current through it)

What is the source of the overvoltage when the MOSFET turns off? The inductive load is pictured with a flyback diode, so I don't see how this would be caused by the inductor. And I would think that the capacitor just gets charged up to its capacity and then maintains a constant voltage.

Any help would be appreciated, thanks in advance.

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  • \$\begingroup\$ I can't say that I recognize all of this waveform as it appears to be a straight line estimate with less correlation to the U-I plot such that it coincides with dI/dt=Uce/L or dU/dt=Ic/C or U/I=R. Yet the diode clips above the supply voltage and the RC snubber absorbs back EMF but the diode OFF capacitance is not big enough to cause the Turn On spike like this. \$\endgroup\$ – Tony Stewart Sunnyskyguy EE75 Feb 15 at 18:31
  • \$\begingroup\$ @Tony Stewart Sunnyskyguy EE75 it is possible that these diagrams were not created with scale in mind, but more with the goal of just showing what behaviors occur on a qualitative level. But I agree that they are unclear, and they have been the source of much confusion for me at times. \$\endgroup\$ – sviva Feb 15 at 19:51
  • \$\begingroup\$ Well none of them match the circuit \$\endgroup\$ – Tony Stewart Sunnyskyguy EE75 Feb 16 at 0:11
  • \$\begingroup\$ As far as turn on is concerned it's just about flywheeling diode recovery current and L/D turn-on snubber. For the switching off instead it's about busbar stray inductance and R/C turn-off snubber. \$\endgroup\$ – carloc Feb 16 at 8:50
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Parasitic capacitance in the MOSFET between drain and source plus external parasitic capacitances mean that when the MOSFET turns on, it is trying to short out these previously charged parasitics and hence, there is always an impulse of current into the MOSFETs drain. Same applies with IGBTs and regular BJTs except internal parasitic device capacitance is usually smaller.

In other words; what do you get when you short a capacitor?

When you turn off a MOSFET, IGBT or BJT, the current that was previously flowing will cause a back emf due to parasitic and/or load inductance. There may be a catch diode (as per the diagrams in the question) but the drain/collector will rise above the supply voltage by one diode drop.

In other words, what happens when you break current in an inductor?
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  • \$\begingroup\$ "There may be a catch diode (as per the diagrams in the question) but the drain/collector will rise above the supply voltage by one diode drop." By this, do you mean that the voltage must spike high enough to cause the flyback diode to become forward biased? Once this occurs the di/dt will go to 0 and then negative, as resistance in the inductor and diode dissipate the energy still stored in the inductor. This produces that final reduction in voltage after it peaks in the second picture. Am I understanding correctly? \$\endgroup\$ – sviva Feb 15 at 19:47
  • \$\begingroup\$ Yes to the first question.... \$\endgroup\$ – Andy aka Feb 15 at 19:51
  • \$\begingroup\$ The final reduction is as it comes to rest at the supply voltage. \$\endgroup\$ – Andy aka Feb 15 at 19:52

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