Computing the voltage and charge of these capacitors in series and parallel, I come up with a situation in which I couldn't explain why the circuit is behaving as it is. The circuit is the following:


simulate this circuit – Schematic created using CircuitLab

Both switches SW1 and SW2 change their position at time \$t_1 = 1~ns\$. Therefore, on the interval \$0 < t < (t_1 = 1~ns)\$, the capacitor \$C_1\$ is connected to the source \$I_1\$. At the end of this first interval:

$$V_1\left(t_1^-\right) = \frac{1}{C_1}\int_0^{t_1}{I_1 dt} = \frac{1}{1~pF}\int_0^{1~ns}{10^{-3}dt} = 1~V$$

and the charge at \$C_1\$ is \$Q|_{t_1^-} = 10^{-12}~C\$

Right after both switches SW1 and SW2 change the position and connect \$C_2\$ and \$C_3\$ to the circuit, the voltage at \$C_2\$ is negative and \$V_1\$ drops to \$0.5~V\$.

Voltages at C_1, C_2 and C_3

Making some numbers, I would have expected that the charge in \$C_1\$ would have been transfered to \$C_3\$, forcing a current from ground to \$V_1\$ node, and then charging negatively \$C_2\$. However, according to my calculations that would set \$V_{C_2}\left(t_1^+\right) = -0.333~V\$ since \$0.333\cdot10^{-12}~C\$ would have been transferred to \$C_3\$: $$Q_{C_1} = Q|_{t_1^-}\frac{C_1}{C_1 + C_3} = 10^{-12} \frac{1~pF}{1~pF + 0.5~pF} = 0.666 \cdot 10^{-12}~C$$ $$Q_{C_2} = Q|_{t_1^-}\frac{C_3}{C_1 + C_3} = 10^{-12} \frac{0.5~pF}{1~pF + 0.5~pF} = 0.333 \cdot 10^{-12}~C$$

Obviously there is some mistake in all this reasoning. However, I can't spot it. Does anyone know what is exactly happening at \$t_1 = 1~ns\$ when both switches change the position and the charge at \$C_1\$ is redistributed, that would explain the values on the plot?


3 Answers 3


Although a very "academic" exercise, assuming "1 μΩ" SPDT switches of "0 pF" switching in zero time...

Assuming a clock at 5e8 rate driving both switches at 50% duty cycle;

from 0 to 1ns \$dV=\dfrac{Ic*dt}{C_1} = \dfrac{1mA*1ns}{1pF}=10V\$ and

at 1ns C1=1pF,10V switches in series with C2=1pF,0V

after t=1ns switch {C1+C2=0.5pF,10V}//{C2=0.5pF,0V} » {1pF,5V)
from 1 to 2ns since the load is still 1pF dV/dt is the same 10V/ns rate start from

The Voltage on C3 acquires 50% the charge of C1 thus C3=5V while C1 drops from 10V to 7.5V and C2 drops from 0 to -2.5V totalling the same C3=5V.

Since the 2 switches add up to 2 μΩ the 10V conducts at 5A-pk but oscillates at +/- 5A then the current doubles the voltage increases after 2ns.

enter image description here

  • \$\begingroup\$ brain phart .. Falstad has many browser applets and this one has many built in ccts using ideal passives tinyurl.com/umlqlwm \$\endgroup\$ Feb 18, 2020 at 0:48

If the switches flip simultaneously, you've got two 1 pF caps in series. Calculate that capacitance. Then you have 500 fF in parallel with that total capacitance. Again calculate the total capacitance.

Since you're not given the inductance or length of the connecting wires, you must assume it to be negligible.

No calculus needed. Simply consider the instantaneous application of 1 mA to the total capacitance.

  • \$\begingroup\$ True , no calculus needed although a lot of imagination to switch even 1pF is zero time with zero Ω switching infinite (?) current then doubling on the next cycle. \$\endgroup\$ Feb 16, 2020 at 23:20
  • \$\begingroup\$ @TonyStewartSunnyskyguyEE75, read the schematic: 1 mA supply. \$\endgroup\$ Feb 16, 2020 at 23:30
  • \$\begingroup\$ Understood already; Read again: 1mA is the source yet the switching current is infinite and in my solution 10App after 1ns :) There is a lot more to neglect than inductance -1 \$\endgroup\$ Feb 16, 2020 at 23:54
  • \$\begingroup\$ You are right that the rate of the effective charge after the switch is the same as before (that's done on purpose). However, it actually needs calculus to know what exactly voltage would end up in the capacitors since, according to simulations, there is a drop in \$V_1\$ that I didn't expect because of that exact reason: the effective capacitance remains the same \$\endgroup\$ Feb 17, 2020 at 22:30

Finally I managed to find an analytical solution to the proposed circuit.
You can find my full equation development on my blog here.

  • 1
    \$\begingroup\$ Adding some outline information from your solution would be 'a very good idea'. Link only answers are discouraged. \$\endgroup\$
    – Russell McMahon
    Sep 21, 2020 at 10:21

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