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In the schematic attached below, what's the purpose of C5 and C6 in conjunction with D7 and D8?

enter image description here

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    \$\begingroup\$ At first glance, they appear to limit the drain to source voltages for Q1 and Q2. \$\endgroup\$ Feb 27, 2020 at 16:22

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D7 and D8 along with C5 and C6 form a voltage reference of roughly 600V for the gate of Q1.

Q1 is a cascode device which buffers the drain voltage of Q2.

The combined "switch" of Q1 and Q2 are then capable of withstanding a much higher voltage than the 800V rating of a single device.

When Q2 turns on, D17 clamps the Vgs of Q1 to 15V, and Q1 turns on as well.

When Q2 turns off, Q1 acts as a source follower, and its source (and therefore the drain of Q2) will sit at roughly one Vth below the gate, which is at the ~600V reference created by D7 and D8.

The drain current of Q2 when off is only the leakage current, so the dissipation in Q1 is small.

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  • \$\begingroup\$ A question.. when Q2 turns off and Q1 remains ON for a brief time, doesn't this cause Q2 to see the full voltage across it? \$\endgroup\$
    – user115094
    Feb 28, 2020 at 15:51
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    \$\begingroup\$ @Blue_Electronx Both Q1 and Q2 have Coss output capacitance. When Q2 turns off, the drain of Q2 starts to rise (charging Coss) until the drain voltage reaches the point where Q1 starts to act as a source follower, at which time it stops rising and the rest of the voltage is dropped across Q1. \$\endgroup\$
    – John D
    Feb 28, 2020 at 18:15
  • \$\begingroup\$ One last question: what could be a way to substitute circuit around Q3? STP3N150 is a really expensive transistor. \$\endgroup\$
    – user115094
    Feb 28, 2020 at 18:19
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    \$\begingroup\$ @Blue_Electronx That's part of the startup circuitry. If your input voltage isn't as high as the design maximum you can get away with a cheaper startup circuit. Otherwise you need a very high voltage FET which is going to be expensive, or some other way to supply an initial 24V to get the controller started. You could look for a depletion mode FET and do it that way, but I don't think they come in that high a voltage rating. I don't think SiC would be cheaper either. \$\endgroup\$
    – John D
    Feb 28, 2020 at 19:02
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In short good engineering practice. While what is said above the caps buffer spikes mentioned both protecting the diodes also smoothing or stabilizing the circuit voltage.

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