I've been teaching myself electronics and a current approach I am taking, is to be able to describe the purpose of every element in the standard TTL NOT gate:

Circuit lab TTL NOT Gate


At this point I understand the purpose of each of the transistors, the diode, and how the 130 ohm resistor supports the desired fanout. I'm still trying to figure out the other resistors. So for the 4 kΩ R1, 1.6 kΩ R2, and 1 kΩ R4, I'm trying to understand why these values (versus, say, 5 kΩ, 2 kΩ, and 1.6 kΩ respectively, for example).

So I have two specific questions:

  1. Why would you choose those specific resistor values (if you were designing this circuit)?

  2. If the values are chosen to support specifications (e.g. a particular sink current amount on the input), why would that specification be desirable in the first place?

Any help will be appreciated. Thanks!


2 Answers 2


The first thing you need to do is realize that this is an "equivalent circuit", and not necessarily a manufacturing schematic. With that in mind, some things are pretty straightforward.

R1 limits the current which will be required to pull the input to ground. At this point, the base current will be about 1 mA. ((5 - 0.6)/4k). It's worth noting that the minimum low input current was specified at 1.6 mA, implying a collector current on the order of 0.6 mA, so Q1 was being driven quite hard.

R3 limits the current which will flow if the output is driven high but grounded. It is scaled to take into account the thermal performance of Q3 under these circumstances, allowing a grounded output to not kill the IC.

R2 provides base current to Q4 when the output is low. It is set by considering the performance of Q4. On the on hand, it needs to be as low as possible in order to provide maximum switching speed, but on the other hand it has to deal with the limitations of Q2 and Q4, which should be as small as possible in order to make the IC chip as small as possible. You need a small chip to increase yields, as early transistor processes had a very high defect rate, and a defect will make the gate unusable (and unsellable).

It also provides base drive to Q3 when the output is high. This doesn't actually work very well, given the limitations of the topology, and TTL gates had much lower ability to source current than to sink it.

Given R2 and Q4, R3 is chosen to provide a reasonable level of clamping for Q4 when the output is high, as you don't want leakage currents to turn Q4 on. It's probably the least critical value of the four resistors.

  • \$\begingroup\$ Thanks for that very detailed answer. \$\endgroup\$ Feb 28, 2020 at 18:21
  • \$\begingroup\$ I'm still trying to understand why R1 is chosen to be 4K specifically. Is there a reason 1mA is a good base current? Or is there a reason 1.6mA is specified? If I were designing this from scratch, which value (4K, 1mA base, or 1.6mA) would I chose first? I imagine one of those numbers has the most significance and they other two then derive from that more critical number? \$\endgroup\$ Feb 28, 2020 at 18:23
  • \$\begingroup\$ @chillcoolcat - It's all a matter of optimizing a cloud of competing limitations. An input current of "about" 1 mA was picked just because. It was something the transistors of the day could handle at a reasonable size. Note that at the time, making defect-free transistors was a real challenge, and that made large transistors a bad idea. On the other hand, making very small transistors was not easy, since the issues of things like mask registration were a problem. \$\endgroup\$ Feb 28, 2020 at 18:40
  • \$\begingroup\$ Power dissipation was a problem, too, so lower currents were A Good Thing - except that running transistors at low current made them slow, and that is A Bad Thing if you want fast logic. It's all a matter of finding a workable compromise, which TTL did very well. The limitations of the technology (bipolar transistors) made for odd constraints, such as non-symmetric logic levels, below 0.8 volts for zero, and above 1.6 volts for high. The advent of CMOS made for much simpler considerations, but TTL was so dominant that the issue persisted. Hence, families like 74HCT \$\endgroup\$ Feb 28, 2020 at 18:40
  • \$\begingroup\$ And in fact, the fastest logic families used larger currents, such as 74S - see princeton.edu/~mae412/HANDOUTS/Datasheets/74S04.PDF for an example. On the other hand, 74LS eventually supplanted 7400-series, and has an input current requirement about 4 times lower. Of course, 74HC pretty much replaced 74LS, but that's progress for you. \$\endgroup\$ Feb 28, 2020 at 18:44

Note the timing uncertainty caused by thermal noise, when the input goes high.

The pullup on base of Q1 is 4K oohm, or about 1mA.

That current will eventually flow into base of Q2, and start to turn on Q2.

As Q2 turns off, its collector starts to drop down from +5. There will be some Miller effect, where a small change of base-emitter voltage will cause a large change of collector voltage, and the change across Ccb will steal lots of charge, creating a plateau on Vbase. The stalling of Vbase makes the circuit very vulnerable to the internal thermal random noise, and Jitter is degraded.

This circuit is standard TTL.

The low power schottky family LPSTTL, using 40,000 ohm input base resistors, and newer generation (faster) transistors, thus higher noise bandwidth, has some of the worse jitter I've ever seen.


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