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I know that after time due to writing/re-writing memory wears out, and I was reading about a microcontroller from TI which uses "wear leveling" to insure the longest life of some EEPROM that the chip used.

I can infer that this will try to write to all of the bits on the chip in some sort of cyclic mechanism so it's not constantly writing/erasing some subset of bits at lower addresses and wearing them out faster.

What I'm really curious about is how does this "wear" happen? What components that make up memory are actually wearing out? My very rudimentary understanding is that computer memory uses latches, or caps, or some such component to retain voltage. If that's correct, do they "just stop" holding voltage after a time?

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  • \$\begingroup\$ You may want to have a look at my answer to a similiar question at stackoverflow. \$\endgroup\$ – JimmyB Nov 7 '12 at 18:30
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http://searchsolidstatestorage.techtarget.com/definition/NAND-flash-wear-out

Failure mode of FLASH memory

This problem is specific to Flash memory. It relies on using a higher than normal voltage to punch electrons across a thin insulating layer into what is effectively a capacitor on the gate of a MOSFET. The insulating layer is extremely thin and eventually this process burns a hole in it.

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  • \$\begingroup\$ That is a very interesting answer. Can the thickness of the insulating layer not be increased to prevent damage? Or would that imply that even higher voltage would be required thus still damaging the part? \$\endgroup\$ – Mike Nov 7 '12 at 16:01
  • \$\begingroup\$ That's the thing, anything you can think of has been tried and has tradeoffs. There are different permanent memory technologies that don't have the problem (FRAM, memristors) but they are not as advanced in miniturisation. \$\endgroup\$ – pjc50 Nov 7 '12 at 16:45
  • \$\begingroup\$ Given the context of EEPROM in microcontrollers, it might be worth noting that TI do sell microcontrollers with FRAM. \$\endgroup\$ – Yann Vernier Nov 8 '12 at 8:46

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