Sizing transistors (W/L) for an IC Operational Amplifier

Question

I have to design a simple operational amplifier in a similar way to what has been shown to me in a lesson at my university course:

I have some basic doubts about how to size the transistors (W/L) and I find online and on the books only explanations which are confused, unsystematic, and not with simple words. Precisely:

1) how can I size the transistors for the current mirror at left? I have seen on the web that they (M9, M10 and all other transistors which mirror the current) are usually sized with L = 3Lmin or 4Lmin in order to increase the output resistance. But this must be compensated with a higher value of W. My question is: why? My possible explanation is that to get a fixed current at the output, if W/L is lower, we need higher VGS, and so there is higher risk to make the transistors work in triode and not in saturation.

2) Which is the role of M11 and how can I size it?

3) How can I size the transistors of the differential pair (M1 and M2)? In this case they have been sized with minimum L and W

4) It has been asked to me to size the differential pair with transistors with transconductance gm = 200uS. Now, in saturation its expression is:

\$g_{m}=2k(V_{GS}-V_t)=\mu C_{ox} W/L (V_{GS}-V_t)\$

where:

• (V_{GS}-V_t) may be evaluated by a simulation
• W/L are chosen by me
• \$\mu\$ and \$C_{ox}\$ are unknown

so there is not the possibility to choose W/L to get the desired \$g_m\$ with this math analysis. How can I see the value of \$g_m\$ with the simulator, fixed W/L?

Answer 1

Yep, circuit design isn't easy especially when you're learning and are a beginner.

What I'm going to explain below should be part of the IC design course you're following. In practice, most courses do not teach this at all. In my case it took me a couple of years of designing circuits to find my own approach.

How to size a current mirror?

^{simulate this circuit – Schematic created using CircuitLab}

As you've pointed out, if in a current mirror circuit, we change \$W\$ then \$V_{GS}\$ changes. Complicated !

The trick is to separate the issues and only change parameters such that only one (or as few as possible) property of the circuit changes.

If, instead of only changing \$W\$, we scale \$L\$ with the same factor so that \$W/L\$ remains the same. Would that change \$V_{GS}\$? Assuming M1 and M2 both work in saturation mode (and that must be the case, else the current mirror would not work) then:

\$I_d= \frac K 2 (V_{gs}-V_t)^2\$ where \$K=\mu C_{ox}\frac WL\$

applies. If we keep \$W/L\$ constant then nothing changes! So, \$V_{GS}\$ does not change.

But what is the point of changing \$W/L\$?

You mentioned "output resistance" and how that's related to the length \$L\$ of the transistor. Larger \$L\$ means higher output resistance.

But if we only increase \$L\$ then \$V_{GS}\$ would change. But if we change both \$W\$ and \$L\$ to keep \$W/L\$ constant, then \$V_{GS}\$ doesn't change which makes things easier!

What if we want to change \$V_{GS}\$?

Then you have several choices:

• change the drain current \$I_D\$
• change \$W\$

Note that you can change \$V_{GS}\$ by changing \$L\$ but I would not do that. Why? Because \$L\$ also affects the output resistance (actually short channel effects) so it is easier to leave \$L\$ alone and just change \$W\$

Why would I want to change \$V_{GS}\$?

That \$V_{GS}\$ is the voltage across M1. Suppose that \$V_{GS}\$ = 2.5 V while your supply voltage is only 2.7 V. That leaves only 0.2 V for some device to create the current \$I_{in}\$. Suppose that device (it will be another transistor) needs 0.5 V, then you will need to lower the \$V_{GS}\$ of M1.

Also think about the lowest voltage on the drain of M2, that is at the output of the mirror. How low can we go before M2 enters triode mode? Yep, that's \$V_{DS,sat}\$ which is \$V_{DS,sat} = V_{GS} - V_t\$ (I like to call this voltage \$V_{gt}\$).

So there is a relation between the \$V_{GS}\$ of M1 and M2 and the point where M2 enters triode mode. A larger \$V_{GS}\$ means that the minimum voltage we can allow at the drain of M2 also increases.

Another tip: you're now simulating the complete circuit, that complicates things. I suggest that you make separate schematics of each part. So the current mirror which biases the differential pair. Another schematic for only the differential pair, use an ideal current source for the tail current and use voltage sources (to sense the currents) instead of the PMOS mirror. Realize that the PMOS mirror just subtracts the output currents of the differential pair from each other. You can do the same with an expression in the simulator. For each circuit realize what is the input and what is the output, for example for a differential pair: input = voltage, output = current. For a current mirror: input = current, output = current.