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I want to develop a data logger with several hardware characteristics (low-power consumption, SDI-12, I2C, SPI, UART, USB, Ethernet, touchscreen display, SD card, RTC, internal memory at least 128MB...) and multiple high-level capabilities (FPT, HTTP/-S, SMTP, encryption, NTP...).

The problem is that if I use a microcontroller it will be hard to implement in software the high-level capabilities (even drivers). Another solution is to use a System-on-module and implement the software part in a high-level programming language (e.g., Python) in Linux, which will make it easier.

The second option seems better, but is there a (ultra-)low-power ARM-based SoM that allows accessing low-level components (interfaces, incl. interrupts) via a high-level programming language in Linux and, most importantly, enables the user to control the sleep modes from the Linux application? Regarding the latter, how can the CPU enter sleep mode and keep the OS running? I am open to any suggestions.

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  • \$\begingroup\$ What is your notion of "low power consumption"? What size touchscreen display do you need, and what kind of refresh rate? How often would that screen be on? A backlit display and "low power consumption" are not quite friends. \$\endgroup\$ – jcaron Mar 4 at 13:02
  • \$\begingroup\$ Also, what does "keep the OS running" mean? What exactly do you need to still be working while sleeping? \$\endgroup\$ – jcaron Mar 4 at 13:05
  • \$\begingroup\$ @jcaron By low power I mean tens of mA, or higher, but it must offer control over sleep modes. The touchscreen can be small, say 5 inches and is turned on only when used. By "keep OS running" I mean the that the software app that triggers the sleep state must still run because it is also responsible (in my initial thinking) for background tasks (sensor data read, monitor, log...). \$\endgroup\$ – Cristian M Mar 4 at 16:52
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Regarding the latter, how can the CPU enter sleep mode and keep the OS running? I am open to any suggestions.

You use co-processors.

Phones are doing this for years now. They have one or more big ARM Cortex-A cores for the *unix based operating system. And one or more smaller ARM Cortex-M like processors for the background stuff.
Like counting your steps using the accelerometer or keeping track of where you are by GPS.

The smaller ones may run an entirely separate operating environment and may not even be on the same chip.

You can do that as well, for example with the a system on chip eg: SP7021 with 4xCortex-A7's, one ARM926 and a 8051 core.

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  • \$\begingroup\$ The SP7021 seems adequate for this application, but do you know if and how it enables sleep control over the integrated cores (e.g., run OS on one core, background tasks on 8051 and put the others to sleep or even turn off? Also, how can the software be protected (e.g. if it is located on the SD card together with the OS)? \$\endgroup\$ – Cristian M Mar 6 at 8:26
  • \$\begingroup\$ @CristianM No, but the documentation of the ARM cores will tell you that. \$\endgroup\$ – Jeroen3 Mar 6 at 14:14
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Look toward Beaglebones. They run linux on the beefy ARMs, but also have Cortex-M cores that you have access to for lower level stuff like interrupts

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Look at building a system using multiple modules or SBCs and remote servers.

Use an ultra low power one to do maintain an RTC and do periodic simple polling. It, in turn, can wake up (or power up via a power relay) the higher powered system(s) to which it can pass the information to do the more costly processing and network protocols. But on an infrequent basis.

For the local display, you may want to look into an e-paper display that retains images even with no power.

For always on data, have the required data passed up to "the cloud" where some gigawatt data center will be getting it's power from somewhere else (not your batteries).

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