# Is PCB testing of all nets after assembly required?

That is my first time asking an assembly house to produce 200 units of a PCB (and not the usual 3 or 5 PCBs). The assembly house came back to me saying that the testability of the board was bad and that they need to have 1.2 mm pads on the bottom side of the PBC for all nets... They require such large pads because beds of nails are a much more economical option than flying probe for 200-400 units since they can do it in-house.

The PCB we are talking about :

• 4-layer PCB (a few power supplies, a battery charger, connectors to screen and other accessories)
• only surface-mount components
• all components on top, 60 euros/PCB (bare PCB + assembly) for 200 units.
• we are targeting 200 units at first, and probably 400 units total. (It is already revision 2 of the same board).
• consumer product

I'm a bit suprised by this request from the assembly house. Using large pads or adding vias on all nets seem to be extreme to me. I'm also a bit surprised not to have noticed such testing pads on other products (if that's even possible to fit them sometimes?).

My questions are :

• Is testing of all nets required for consumer products? Is it common practice? I was more thinking about some higher level tests (if the screen works, if all buttons works, if the battery charger delivers the good amount of current, etc.).
• Is adding 1.2 mm pad on ALL nets common practice for PCB?
• is it normal that the assembly house increases the assembly cost if they don't do the bed of nails? The cost of the bed of nails is almost as much as burning (fully) 40 PCBs...
• I may be a bit naive there but they seem to say that they want to test all nets in order to check if resistors/capacitors/others are good. Is it so common that an assembly house mixed up components on a few boards?
• I never assumed it had to do with part mix-ups, more so dead components. Mar 6, 2020 at 19:59
• Part mixups, open/short circuits, (slivers of solder UNDER an SMD part), tombstoned components where uneven solder melting lifts one end off the board, dead components, you name it. Mar 6, 2020 at 20:01
• PCB missing internal layers, or layer vs layer registration/alignment errors... I once had a PCB vendor whose technician modified the design without permission(!), and also fudged the netlist to pass vendor’s internal QA LVS check. (Vendor now disqualified). With a larger run, or more assembly lots, there is cumulative exposure to Murphy’s Law. Building a test rig does increase your NRE, but in the long run it’s better to intercept problems early. Mar 7, 2020 at 0:04

Putting in those pads first time round is called DFM (Design For Manufacture). And it sounds like they're giving you a good price on the bed of nails.

Either get this flow working (it's perfectly normal) or ask your next fab house if they have a flying probe tester in house.

One way to economise is to use bed of nails ONLY for nets that don't already have connectors attached, and to break out test cables from those connectors to their ATE.

I do this for my own projects for small runs, where I don't mind adding the time spent plugging/unplugging connectors to the test time. It can save money on the fixture. but it's a pain and makes the test more expensive. You can ask them if this is an option, but I wouldn't be surprised if they refuse.

Yes there are other test options : as well as flying probe, there are 2-sided versions of bed of nails which saves the need to bring all nodes out to the test side ... but you don't want to know the price!

• I agree with Brian. 1st time I had to do this I moaned a bit but it was worth the effort of redoing the PCBs and our yields increased nicely. Mar 6, 2020 at 19:58
• You should be using test points for flying probe anyway. If you do not, the pressure from the probe can cause an open circuit fault to appear as a closed circuit. Also how can you test for dry joints without test points? One multinational I used to work for had an operating procedure requiring 1mm test points on all nets with four test points for power nets. All our boards were tested with flying probe. Mar 7, 2020 at 7:48
• But on a PCB with generous trace width and safety margins, is PCB testing really necessary? What kind of errors can it even catch? Can it be replaced with a “high level” test (which you’ll need anyway) by a human or an automated microcontroller test (especially if the components are cheap)? Mar 7, 2020 at 14:22
• Trace width? PCB faults like broken or shorted traces will be caught by bare board testing anyway. Which is a free option from the suppliers I use. No, this is about testing the ASSEMBLED PCB. If you are interested in selling quality product, it is necessary. Mar 7, 2020 at 17:45

One figure of merit we use to evaluate how good or bad we're doing goes by the acronym FTTTY, or First Time Through Test Yield. It's a measure of how many boards/assemblies pass their acceptance testing the first time through.

In order to improve FTTTY, we like to do as much testing of things before they reach the final test phase of production. Hence all of our PWBs are 100% tested by the manufacturer, and their ability to do this kind of testing, of which bed-of-nails is only one type, goes into our evaluation of them as a vendor.

Now most of our products are expensive, aimed at high-end Mil-Aero-Space applications. It's not unusual to have a single component such as a high capacity, high ball count FPGA cost upwards of $25K. One thing we don't want to do is to scrap such an expensive assembly after having mounted all of the components because of a flaw in the PWB that is not discovered until board test. Therefore we (and our customers) are more than willing to spend money early in the build phase to improve our chances of FTTTY. A lot depends the end/sell cost of your product, what your yield would be with and without testing of bare PWBs, and how that impacts the average cost of your product. If the sell cost of your product is, for instance,$20, and your building 200 of them, it may be more cost effective for you to NOT test the bare PWBs if it means investing several thousand dollars up front to set up PWB testing by the vendor.

We call it 100% test points and is a absolute need from us to provide it without fail. Every net which we fail to connect to the net pad needs a clearance from the whole team.

1. Accidents are common in line assembly

2. Components fail sometimes after soldering (due to chemicals or high temperature)

3. Solder itself can get stuck creating short are lower resistance paths

4. The wrong components can also get into the board due to manual error

5. Supplier can supply Wrong items

6. The components can also be counterfeit

7. The ICT even for a board with 200 to 250 components doesn't take more than 10 seconds. So it is not a big hurdle timewise.

8. The exception will be where impedance control is strictly needed such as RF and filtering sections.

9. Further to bed of nails test, camera test can also help check the mounting direction and misalignment or poor alignment of components on the pad.

10. When the number of products grows, and the complexity of the board, investing on such a solution is in best interest of quality and intime Delivery at a little higher cost.

11. Larger vias are good for plant to realise the bed of nails at lower precision and lower cost

12. Designer should consider the ill effects of the via or extra Routing

You should thank your PCB supplier! Design for testability is a major issue in electronic systems. Usually the managers want to save three cents by omitting test and control points. Then 5 years later they find that they have a unit that is untestable and must be disassembled before a fault can be diagnosed, costing hundreds of dollars and causing the ATE engineer to curse the manager. (At least that is what I did when I used to do that kind of work.)