After getting some advices from my PCB manufacturer and from people here, I decided to change the PCB design I'm working on so the PCB could be tested using a bed of nails.
To do so, I added test points on all nets. Since the components are on the top only and that some tracks were also only on top, I had to create vias to connect these tracks to some large pads (1.2 mm) on the bottom. It is where I started to get worried that I was actually creating some net antennas everywhere on the circuit... My worries didn't really get better since some test points are on the switching node of power supplies (from 200 KHz to 2 MHz).
The PCB we are talking about :
- 4-layer PCB (a few power supplies, a battery charger, connectors to screen and other accessories) only surface-mount components - no impedance control on any tracks
My questions are:
- Is it a bad design choice to add vias (not connected to anything on the bottom side since it is only a test point) on switching node and other "high frequency" ( < 10 MHz) traces? The vias are to test traces existing only on top using a test point on the bottom.
- Does it exist a rule of thumb to know what a maximum acceptable net antennas for a signal working in some known working frequencies?
- Should I just stop worrying about it?
EDIT: Maximum "net antenna length" to be able to place a test point is about 3 mm...